Process for manufacturing semiconductor device
Abstract
Abstract A process for manufacturing a semiconductor device which comprises the following steps of (i) forming a first insulating film on the whole surface of a semiconductor substrate having thereon a thin conductive layer with an intervening gate insulating film, (ii) removing the first insulating film at a channel region to cause the thin conductive layer to be exposed, thereby forming an opening portion, (iii) implanting ions in the opening portion to form a channel region in the substrate, (iv) forming a gate electrode of a conductive material in the opening portion, (v) removing only the first insulating film with leaving the gate electrode as it is and then implanting ions by using the gate as a mask to form a low carrier density region in the substrate, (vi) layering a second insulating film on the substrate including the gate and then carrying out an anisotropic etching to build a sidewall of the gate electrode, and (vii) implanting ions by use of the gate electrode and its sidewall as a mask to form a high carrier density region on the substrate, whereby completing an insulating gate type of field effect transistor having a low carrier density region for mitigating field effect, the low carrier density region adjoining to source and drain regions of high carrier density.
Inventors
- 👤 Kenichi Azuma
- 👤 Akio Kawamura
Bibliographic Details
Claims Analysis
Total Claims: 6References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
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| 3.5 Years (Year 4) | 1996-11-29 | 1997-05-31 | 1997-11-30 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2000-11-29 | 2001-05-31 | 2001-11-30 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2004-11-29 | 2005-05-31 | 2005-11-30 | $7700.00 | Window Closed / Lapsed |