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US5266508A Expired / Lapsed US ⏱️ 0.0 years remaining

Process for manufacturing semiconductor device

Assignee: Sharp Corp
•
Filing: 1992-08-24
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Granted: 1993-11-30
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Expires: 2012-08-24
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Abstract

Abstract A process for manufacturing a semiconductor device which comprises the following steps of (i) forming a first insulating film on the whole surface of a semiconductor substrate having thereon a thin conductive layer with an intervening gate insulating film, (ii) removing the first insulating film at a channel region to cause the thin conductive layer to be exposed, thereby forming an opening portion, (iii) implanting ions in the opening portion to form a channel region in the substrate, (iv) forming a gate electrode of a conductive material in the opening portion, (v) removing only the first insulating film with leaving the gate electrode as it is and then implanting ions by using the gate as a mask to form a low carrier density region in the substrate, (vi) layering a second insulating film on the substrate including the gate and then carrying out an anisotropic etching to build a sidewall of the gate electrode, and (vii) implanting ions by use of the gate electrode and its sidewall as a mask to form a high carrier density region on the substrate, whereby completing an insulating gate type of field effect transistor having a low carrier density region for mitigating field effect, the low carrier density region adjoining to source and drain regions of high carrier density.

Inventors

  • 👤 Kenichi Azuma
  • 👤 Akio Kawamura

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-28 15:49
CPC Classifications
H; H10; H10D; H10D30/00; H10D30/01; H10D30/021; H10D30/0223; H10D30/0225; H10D30/60; H10D30/601; H10D30/605; H10D64/00; H10D64/20; H10D64/27; H10D64/311; H10D64/411; H10D64/511; H10D64/517; H10D64/518; H10D30/0217

Claims Analysis

Total Claims: 6
Claim 1
Independent Claim 197 words
A process for manufacturing a semiconductor device which comprises the following steps of (i) forming a first insulating film on the whole surface of a semiconductor substrate having thereunder a thin conductive layer with an intervening gate insulating film in which the semiconductor substrate is implanted with impurity ions of a first conductivity type before forming said first insulating film, said thin film conductive layer and said intervening gate insulating film, (ii) removing the first insulating film at a channel region to cause the thin conductive layer to be exposed, thereby forming an opening portion, (iii) implanting ions of a second conductivity type in the opening portion to set a threshold value of the transistor in the substrate, (iv) forming a gate electrode of a conductive material in the opening portion, (v) removing only the first insulating film while leaving the gate electrode, (vi) layering a second insulating film on the substrate including the gate electrode and then carrying out an aniosotropic etching to build a sidewall of the gate electrode, and (vii) implanting ions by use of the gate electrode and its sidewall as a mask to form a high carrier density region on the substrate.
Claim 2
Dependent Claim 197 words
A process for manufacturing a semiconductor device which comprises the following steps of (i) forming a first insulating film on the whole surface of a semiconductor substrate having thereunder a thin conductive layer with an intervening gate insulating film in which the semiconductor substrate is implanted with impurity ions of a first conductivity type before forming said first insulating film, said thin film conductive layer and said intervening gate insulating film, (ii) removing the first insulating film at a channel region to cause the thin conductive layer to be exposed, thereby forming an opening portion, (iii) implanting ions of a second conductivity type in the opening portion to set a threshold value of the transistor in the substrate, (iv) forming a gate electrode of a conductive material in the opening portion, (v) removing only the first insulating film while leaving the gate electrode, (vi) layering a second insulating film on the substrate including the gate electrode and then carrying out an aniosotropic etching to build a sidewall of the gate electrode, and (vii) implanting ions by use of the gate electrode and its sidewall as a mask to form a high carrier density region on the substrate.
Claim 3
Dependent Claim 54 words
A process for manufacturing a semiconductor device as set forth in claim 1, wherein the step (iv) for forming a gate electrode of a conductive material involves depositing a thick polysilicon layer on the whole surface of the substrate including the opening portion and then etching back the substrate, thereby forming the gate electrode.
Claim 4
Dependent Claim 46 words
A process for manufacturing a semiconductor device as set forth in claim 1, wherein the step (iv) for forming a gate electrode of a conductive material involves selectively causing tungsten or other conductive material to be grown in the opening portion, thereby forming the gate electrode.
Claim 5
Dependent Claim 28 words
A process for manufacturing a semiconductor device as set forth in claim 1, wherein the thin conductive layer in step (i) is formed of poly Si or α-Si.
Claim 6
Dependent Claim 39 words
A process for manufacturing a semiconductor device as set forth in claim 1, wherein the conductive type of impurity ions implanted in step (iii) are opposite to that of the impurity ions implanted in step (i) and step (vii).

References Cited (Backward Citations)

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US4963504A Cited
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US5082794A Cited
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USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1996-11-29 1997-05-31 1997-11-30 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2000-11-29 2001-05-31 2001-11-30 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2004-11-29 2005-05-31 2005-11-30 $7700.00 Window Closed / Lapsed

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