Patent US5877516A successfully refreshed from Google Patents.
US5877516A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Bonding of silicon carbide directly to a semiconductor substrate by using silicon to silicon bonding
Assignee: United States Department of the Army
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Filing: 1998-03-20
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Granted: 1999-03-02
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Expires: 2018-03-20
Abstract
Abstract A module and a method of making the module is disclosed. The module is formed from a semiconductor substrate and a silicon carbide chip for high temperature applications. The module is designed to be compatible with current silicon IC processes.
Inventors
- 👤 Timothy Mermagen
- 👤 Judith McCullen
- 👤 Robert Reams
- 👤 Bohdan Dobriansky
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-05 20:43
CPC Classifications
H; H10; H10W; H10W70/00; H10W70/60; H10W70/67; H10W70/69; H10W70/698; H10W72/00; H10W72/30; H10W72/071; H10W72/073; H10W72/07331; H10W72/075; H10W72/07531; H10W72/351; H10W72/353; H10W72/354; Y; Y10; Y10S; Y10S438/00; Y10S438/931; Y10S438/973
Claims Analysis
Total Claims: 4
Claim 1
Independent Claim
96 words
A multi-chip module comprising: (a) a semiconductor substrate having a top surface comprising a first crystallographic plane, and a first silicon dioxide insulating film deposited thereon; (b) a carbide chip having a bottom surface comprising a second crystallographic plane, and a second silicon dioxide insulating film deposited thereon; said semiconductor substrate and said carbide chip further positioned so as to align said first crystallographic plane with said second crystallographic plane whereby said first and said second silicon dioxide insulating films are in contact and become bonded to each other by bringing said module up to temperature.
Claim 2
Dependent Claim
96 words
A multi-chip module comprising: (a) a semiconductor substrate having a top surface comprising a first crystallographic plane, and a first silicon dioxide insulating film deposited thereon; (b) a carbide chip having a bottom surface comprising a second crystallographic plane, and a second silicon dioxide insulating film deposited thereon; said semiconductor substrate and said carbide chip further positioned so as to align said first crystallographic plane with said second crystallographic plane whereby said first and said second silicon dioxide insulating films are in contact and become bonded to each other by bringing said module up to temperature.
Claim 3
Dependent Claim
20 words
The module as recited in claim 1 wherein said semiconductor substrate is a <100> orientation 1.3 Ω-cm n-type silicon wafer.
Claim 4
Dependent Claim
16 words
The module as recited in claim 1 wherein said carbide chip is a silicon carbide chip.
References Cited (Backward Citations)
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US4560589A
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2002-03-01 | 2002-08-31 | 2003-03-02 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2006-03-01 | 2006-08-31 | 2007-03-02 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2010-03-01 | 2010-08-31 | 2011-03-02 | $7700.00 | Window Closed / Lapsed |