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US5875100A Expired / Lapsed US ⏱️ 0.0 years remaining

High-density mounting method and structure for electronic circuit board

Assignee: NEC Corp
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Filing: 1997-05-30
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Granted: 1999-02-23
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Expires: 2017-05-30
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Abstract

Abstract In a high-density mounting method for an electronic circuit board, a stud bump is formed on a connection terminal of a semiconductor chip. The semiconductor chip is buried in a printed circuit board such that the stud bump has a height almost equal to that of a surface of the printed circuit board. At least a surface of the printed circuit board where the semiconductor chip is buried is covered with a first insulating layer. A hole is formed in the first insulating layer by using a laser to expose the stud bump. A first wiring pattern is selectively formed on the first insulating layer, thereby connecting the first wiring pattern and the exposed stud bump to each other. A high-density mounting structure for an electronic circuit board is also disclosed.

Inventors

  • 👤 Koji Yamashita

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-09 17:15
CPC Classifications
H; H10; H10W; H10W90/00; H05; H05K; H05K1/00; H05K1/18; H05K1/182; H05K1/185; H05K3/00; H05K3/46; H05K3/4602; H10W70/00; H10W70/099; H10W70/60; H10W70/67; H10W70/68; H10W70/682; H10W72/00; H10W72/01; H10W72/012; H10W72/01221; H10W72/01225; H10W72/071; H10W72/073; H10W72/20; H10W72/251; H10W72/252; H10W72/851; H10W72/874; H10W90/701; H10W90/731; H10W90/734

Claims Analysis

Total Claims: 7
Claim 1
Independent Claim 105 words
A high-density mounting structure for an electronic circuit board, comprising: an electronic component having a connection terminal to which a stud bump is bonded; a board in which said electronic component is to be buried, said stud bump being substantially flush with a surface of said board; a first insulating layer for covering at least a surface of said board in which said electronic component is buried; a hole formed in said first insulating layer to expose said stud bump; and a first wiring pattern selectively formed on said first insulating layer, said first wiring pattern being connected to said stud bump which is exposed.
Claim 2
Dependent Claim 105 words
A high-density mounting structure for an electronic circuit board, comprising: an electronic component having a connection terminal to which a stud bump is bonded; a board in which said electronic component is to be buried, said stud bump being substantially flush with a surface of said board; a first insulating layer for covering at least a surface of said board in which said electronic component is buried; a hole formed in said first insulating layer to expose said stud bump; and a first wiring pattern selectively formed on said first insulating layer, said first wiring pattern being connected to said stud bump which is exposed.
Claim 3
Dependent Claim 38 words
A structure according to claim 1, wherein said board has a recessed portion for mounting said electronic component therein, and said first insulating layer covers said electronic component mounted in said recessed portion and said first insulating layer.
Claim 4
Dependent Claim 27 words
A structure according to claim 1, wherein said first insulating layer is formed on each of two surfaces of said board with an insulating material by coating.
Claim 5
Dependent Claim 24 words
A structure according to claim 1, wherein said first wiring pattern is formed by selectively removing a metallized layer formed on said insulating layer.
Claim 6
Dependent Claim 63 words
A structure according to claim 1, further comprising: a second insulating layer formed on said first insulating layer on which said first wiring pattern is formed; a hole formed in said second insulating layer to expose said first wiring pattern; and a second wiring pattern selectively formed on said second insulating layer to be connected to said first wiring pattern which is exposed.
Claim 7
Dependent Claim 55 words
A structure according to claim 1, further comprising a third wiring pattern formed on said board, and wherein said hole is formed in said first insulating layer to correspond to said third wiring pattern, thereby exposing said third wiring pattern, and said first wiring pattern is connected to said third wiring pattern which is exposed.

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 2002-02-22 2002-08-24 2003-02-23 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2006-02-22 2006-08-24 2007-02-23 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2010-02-22 2010-08-24 2011-02-23 $7700.00 Window Closed / Lapsed

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