US5860099A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Stored program system with protected memory and secure signature extraction
Assignee: USARSYS ACQUISITION CORP
•
Filing: 1993-05-12
•
Granted: 1999-01-12
•
Expires: 2013-05-12
Abstract
Abstract A controller contains software which, when triggered in some prearranged way such as assertion of an input to the controller, calculates a digital signature for the contents of the protected memory of the controller. The digital signature is preferably extracted from the contents of the memory with a function that varies greatly with even small changes to the memory contents. The function preferably is such that one cannot easily determine from the output what input generated the output. The function is preferably such that one cannot easily create a data set for input that yields any particular predetermined output. The circuitry generating the signature may be embedded in hardware of the controller so that its digital signature function is unknown even to the programmer writing the main body of code to be stored in the protected memory. With such a hardware configuration, it is possible to have a very high degree of confidence that the memory contents are what they are expected to be.
Inventors
- 👤 Ioannis Milios
- 👤 Carl Oppedahl
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-29 09:22
CPC Classifications
H; H04; H04L; H04L9/00; H04L9/32; H04L9/3247; G; G06; G06F; G06F12/00; G06F12/14; G06F12/1408; H04L2209/00; H04L2209/60; H04L2209/605
Claims Analysis
Total Claims: 6
Claim 1
Independent Claim
231 words
A stored program system comprising a processor within an integrated circuit; a bus operatively coupled with the processor; a memory within the integrated circuit and coupled with the bus from which the processor fetches instructions, said memory having contents; protection means within the integrated circuit and operatively coupled with the memory and with the bus, said protection means rendering the memory not readily readable by a user; input means within the integrated circuit receiving an input external to the integrated circuit and generating a signal indicative thereof; signature extraction means within the integrated circuit and operatively coupled with the memory, said signature extraction means responsive to the signal for reading substantially all the contents of the memory via the bus and extracting a signature reflective thereof; and output means within the integrated circuit and operatively coupled with the signature extraction means and responsive to extraction of the signature for communicating the signature external to the integrated circuit, wherein the signature extraction means comprises the processor executing a stored program stored within the memory, wherein the stored program comprises a routine evaluating a polynomial taking bytes of data from the memory as input, each byte having an address, the polynomial having at least one coefficient that is large relative to the value of the bytes, the stored program further comprising repeatedly subtracting a prime number smaller than the at least one coefficient.
Claim 2
Dependent Claim
231 words
A stored program system comprising a processor within an integrated circuit; a bus operatively coupled with the processor; a memory within the integrated circuit and coupled with the bus from which the processor fetches instructions, said memory having contents; protection means within the integrated circuit and operatively coupled with the memory and with the bus, said protection means rendering the memory not readily readable by a user; input means within the integrated circuit receiving an input external to the integrated circuit and generating a signal indicative thereof; signature extraction means within the integrated circuit and operatively coupled with the memory, said signature extraction means responsive to the signal for reading substantially all the contents of the memory via the bus and extracting a signature reflective thereof; and output means within the integrated circuit and operatively coupled with the signature extraction means and responsive to extraction of the signature for communicating the signature external to the integrated circuit, wherein the signature extraction means comprises the processor executing a stored program stored within the memory, wherein the stored program comprises a routine evaluating a polynomial taking bytes of data from the memory as input, each byte having an address, the polynomial having at least one coefficient that is large relative to the value of the bytes, the stored program further comprising repeatedly subtracting a prime number smaller than the at least one coefficient.
Claim 3
Dependent Claim
22 words
The system of claim 1 wherein the polynomial also takes as input the addresses from which the bytes of data are taken.
Claim 4
Dependent Claim
225 words
A stored program system comprising a processor within an integrated circuit; a bus operatively coupled with the processor; a memory within the integrated circuit and coupled with the bus from which the processor fetches instructions, said memory having contents; protection means within the integrated circuit and operatively coupled with the memory and with the bus, said protection means rendering the memory not readily readable by a user; input means within the integrated circuit receiving an input external to the integrated circuit and generating a signal indicative thereof; signature extraction means within the integrated circuit and operatively coupled with the memory, said signature extraction means responsive to the signal for reading substantially all the contents of the memory via the bus and extracting a signature reflective thereof; and output means within the integrated circuit and operatively coupled with the signature extraction means and responsive to extraction of the signature for communicating the signature external to the integrated circuit, wherein the signature extraction means comprises circuitry within the integrated circuit and apart from the processor, wherein the circuitry evaluates a function comprising a polynomial taking bytes of data from the memory as input, the polynomial having at least one coefficient that is large relative to the value of the bytes, the function further comprising a modulo function with respect to a prime number smaller than the coefficient.
Claim 5
Dependent Claim
225 words
A stored program system comprising a processor within an integrated circuit; a bus operatively coupled with the processor; a memory within the integrated circuit and coupled with the bus from which the processor fetches instructions, said memory having contents; protection means within the integrated circuit and operatively coupled with the memory and with the bus, said protection means rendering the memory not readily readable by a user; input means within the integrated circuit receiving an input external to the integrated circuit and generating a signal indicative thereof; signature extraction means within the integrated circuit and operatively coupled with the memory, said signature extraction means responsive to the signal for reading substantially all the contents of the memory via the bus and extracting a signature reflective thereof; and output means within the integrated circuit and operatively coupled with the signature extraction means and responsive to extraction of the signature for communicating the signature external to the integrated circuit, wherein the signature extraction means comprises circuitry within the integrated circuit and apart from the processor, wherein the circuitry evaluates a function comprising a polynomial taking bytes of data from the memory as input, the polynomial having at least one coefficient that is large relative to the value of the bytes, the function further comprising a modulo function with respect to a prime number smaller than the coefficient.
Claim 6
Dependent Claim
22 words
The system of claim 3 wherein the polynomial also takes as input the addresses from which the bytes of data are taken.
References Cited (Backward Citations)
US4467444A
Cited
US4584665A
Cited
US4698750A
Cited
US5175840A
Cited
US5101498A
Cited
US5396609A
Cited
US5144659A
Cited
US5379433A
Cited
US5099516A
Cited
US5191608A
Cited
US5251304A
Cited
US5255244A
Cited
US5388157A
Cited
US5224166A
Cited
US5282247A
Cited
US5351216A
Cited
US5349249A
Cited
US5386469A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2002-01-11 | 2002-07-13 | 2003-01-12 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2006-01-11 | 2006-07-13 | 2007-01-12 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2010-01-11 | 2010-07-13 | 2011-01-12 | $7700.00 | Window Closed / Lapsed |