US5349249A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Programmable logic device having security elements located amongst configuration bit location to prevent unauthorized reading
Assignee: Xilinx Inc
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Filing: 1993-04-07
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Granted: 1994-09-20
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Expires: 2013-04-07
Abstract
Abstract More than one security bit is used in a block of a PLD chip. The internal configuration and other information is left unprotected when all the security bits are in the erased state, and is protected by programming one or all the security bits. The security bits are located physically in proximity to the areas containing configuration and any other user-defined data, both so that they are difficult to discover and so that the erasure of all security bits in a EPROM-based PLD would cause a large number of adjacent user-defined bits to be erased as well, hence making it very difficult to extract useful information from a protected device by reverse engineering. Situating security bits in a different, pseudorandom location within each block of the chip makes them difficult to find and so further inhibits reverse engineering.
Inventors
- 👤 David Chiang
- 👤 Thomas Y. Ho
- 👤 Wei-Yi Ku
- 👤 George H. Simmons
- 👤 Robert W. Barker
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-30 09:29
CPC Classifications
H; H10; H10W; H10W42/00; H10W42/40; G; G06; G06F; G06F12/00; G06F12/14; G06F12/1416; G06F12/1425; G06F21/00; G06F21/70; G06F21/78; G06F21/79
Claims Analysis
Total Claims: 19
Claim 1
Independent Claim
167 words
A method for improving design security in a programmable logic device on an integrated circuit die, comprising: providing on the integrated circuit die an array of programmable configuration elements; providing on the integrated circuit die a plurality of programmable security elements, each having a state which allows readback and a state which does not allow readback, and wherein each programmable security element is distributed among programmable configured elements of said array; connecting said plurality of programmable security elements to the integrated circuit, wherein said plurality of programmable security elements enables data to be read out from the programmable logic device only when each of said plurality of programmable security elements is set to its state which allows readback; and said plurality of programmable security elements disables the reading of data when at least one of said programmable security elements is set to its state which does not allow readback; and setting at least one of said programmable security elements to its state which does not allow readback.
Claim 2
Independent Claim
167 words
A method for improving design security in a programmable logic device on an integrated circuit die, comprising: providing on the integrated circuit die an array of programmable configuration elements; providing on the integrated circuit die a plurality of programmable security elements, each having a state which allows readback and a state which does not allow readback, and wherein each programmable security element is distributed among programmable configured elements of said array; connecting said plurality of programmable security elements to the integrated circuit, wherein said plurality of programmable security elements enables data to be read out from the programmable logic device only when each of said plurality of programmable security elements is set to its state which allows readback; and said plurality of programmable security elements disables the reading of data when at least one of said programmable security elements is set to its state which does not allow readback; and setting at least one of said programmable security elements to its state which does not allow readback.
Claim 3
Dependent Claim
21 words
The method of claim 1, wherein each programmable security element is randomly distributed among said programmable configuration elements of said array.
Claim 4
Dependent Claim
21 words
A method as in claim 1, wherein said programmable security elements are disposed at irregular locations in the programmable logic device.
Claim 5
Dependent Claim
18 words
A method as in claim 1, wherein the programmable security elements and programmable configuration elements are structurally identical.
Claim 6
Dependent Claim
16 words
A method as in claim 4, wherein said same programmable security elements are light-erasable programmable elements.
Claim 7
Dependent Claim
12 words
A method as in claim 5, wherein the light is ultraviolet light.
Claim 8
Independent Claim
173 words
A method for improving design security in a programmable logic device on an integrated circuit die, comprising: providing on the integrated circuit die a plurality of programmable security elements, each having a state which allows readback and a state which does not allow readback; disposing each of the programmable security elements in proximity to areas containing data for the programmable logic device on the integrated circuit die at irregular locations in the programmable logic device; connecting said plurality of programmable security elements to the integrated circuit, wherein said plurality of programmable security elements enables said data to be read out from the programmable logic device only when each of said plurality of programmable security elements is set to its state which allows readback; and said plurality of programmable security elements disables the reading of said data when at least one of said programmable security elements is set to its state which does not allow readback; and setting at least one of said programmable security elements to its state which does not allow readback.
Claim 9
Independent Claim
173 words
A method for improving design security in a programmable logic device on an integrated circuit die, comprising: providing on the integrated circuit die a plurality of programmable security elements, each having a state which allows readback and a state which does not allow readback; disposing each of the programmable security elements in proximity to areas containing data for the programmable logic device on the integrated circuit die at irregular locations in the programmable logic device; connecting said plurality of programmable security elements to the integrated circuit, wherein said plurality of programmable security elements enables said data to be read out from the programmable logic device only when each of said plurality of programmable security elements is set to its state which allows readback; and said plurality of programmable security elements disables the reading of said data when at least one of said programmable security elements is set to its state which does not allow readback; and setting at least one of said programmable security elements to its state which does not allow readback.
Claim 10
Dependent Claim
100 words
A programmable logic device comprising: an array of programmable configuration elements; a plurality of programmable security elements, each having a first state and a second state, each programmable security element being distributed among elements of said array of programmable configuration elements; said plurality of programmable security elements enabling data to be read from the programmable logic device only when each of said plurality of programmable security elements is et to the first state; and said plurality of programmable security elements disabling the reading of data when at least one of said programmable security elements is set to the second state.
Claim 11
Dependent Claim
100 words
A programmable logic device comprising: an array of programmable configuration elements; a plurality of programmable security elements, each having a first state and a second state, each programmable security element being distributed among elements of said array of programmable configuration elements; said plurality of programmable security elements enabling data to be read from the programmable logic device only when each of said plurality of programmable security elements is et to the first state; and said plurality of programmable security elements disabling the reading of data when at least one of said programmable security elements is set to the second state.
Claim 12
Dependent Claim
20 words
The device of claim 8, wherein each programmable security element is randomly distributed among said array of programmable configuration elements.
Claim 13
Dependent Claim
22 words
A device as in claim 8, wherein said plurality of programmable security elements are distributed across said array in an irregular pattern.
Claim 14
Dependent Claim
19 words
A device as in claim 8, wherein the programmable security elements and the programmable configuration elements are light-erasable elements.
Claim 15
Dependent Claim
92 words
An EPROM-based programmable logic device comprising: at least one EPROM array for storing user-defined data; a plurality of programmable security bits distributed among programmable elements of said EPROM array; said plurality of programmable security bits enabling data to be read from the EPROM array when each of the plurality of programmable security bits is set to one of its binary values; and said plurality of programmable security bits disabling the reading of configuration data when at least one of said programmable security bits is set to the other of its binary values.
Claim 16
Dependent Claim
92 words
An EPROM-based programmable logic device comprising: at least one EPROM array for storing user-defined data; a plurality of programmable security bits distributed among programmable elements of said EPROM array; said plurality of programmable security bits enabling data to be read from the EPROM array when each of the plurality of programmable security bits is set to one of its binary values; and said plurality of programmable security bits disabling the reading of configuration data when at least one of said programmable security bits is set to the other of its binary values.
Claim 17
Dependent Claim
24 words
An EPROM-based programmable logic device as in claim 12, wherein said programmable security bits are distributed among said programmable elements in an irregular manner.
Claim 18
Dependent Claim
99 words
A programmable logic device comprising: a plurality of programmable security elements, each having a first state and a second state; an array of programmable configuration elements, wherein said plurality of programmable security elements are distributed in an irregular pattern on said array; said plurality of programmable security elements enabling data to be read from the programmable logic device only when each of said plurality of programmable security elements is set to the first state; and said plurality of programmable security elements disabling the reading of data when at least one of said programmable security elements is set to oZ
Claim 19
Dependent Claim
99 words
A programmable logic device comprising: a plurality of programmable security elements, each having a first state and a second state; an array of programmable configuration elements, wherein said plurality of programmable security elements are distributed in an irregular pattern on said array; said plurality of programmable security elements enabling data to be read from the programmable logic device only when each of said plurality of programmable security elements is set to the first state; and said plurality of programmable security elements disabling the reading of data when at least one of said programmable security elements is set to oZ
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1997-09-19 | 1998-03-21 | 1998-09-20 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2001-09-19 | 2002-03-21 | 2002-09-20 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2005-09-19 | 2006-03-21 | 2006-09-20 | $7700.00 | Window Closed / Lapsed |