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US5835405A
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Application specific modules in a programmable logic device
Assignee: Lattice Semiconductor Corp
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Filing: 1997-04-10
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Granted: 1998-11-10
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Expires: 2017-04-10
Abstract
Abstract A structure and a method provide a programmable logic device including a number of generic logic blocks and one or more application-specific block. Such application-specific block implements a specific function, such as a register file or a memory array. In one embodiment, the application specific block is programmable to be either one or more single-port memory array, a first-in-first-out (FIFO) memory, or a dual port memory array. In another embodiment, the application-specific block can be configured to be a register file, a number of counters, a number of timers, or a shift register. The application-specific block can be used in conjunction with programmable logic arrays for multiplexing input and output signals into and out of the application-specific block. Interconnectivity between the generic logic blocks and the application-specific blocks using a global routing resource integrates into a programmable logic device functions otherwise difficult to implement using only generic logic blocks.
Inventors
- 👤 Cyrus Y. Tsui
- 👤 Kapil Shankar
- 👤 Albert L. Chan
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-08 16:23
CPC Classifications
H; H03; H03K; H03K19/00; H03K19/02; H03K19/173; H03K19/177; H03K19/17736; H03K19/17744; H03K19/1733; H03K19/1735; H03K19/1736; H03K19/17704; H03K19/17724; H03K19/17732
Claims Analysis
Total Claims: 42
Claim 1
Independent Claim
133 words
A programmable logic integrated circuit, comprising: a programmable logic circuit, said programmable logic circuit having programmable logic cells for configuring into a logic circuit; a programmable storage circuit, said programmable storage circuit being a storage element module configurable into one of a plurality of predetermined configurations; and a programmable interconnection resource for programmably interconnecting said programmable logic circuit and said programmable storage circuit, and wherein said programmable interconnection resource further comprises a switch matrix of interconnection lines and said programmable storage circuit comprises a plurality of input and output terminals, said integrated circuit further comprises a programmable interface interconnection block between said programmable storage circuit and said programmable interconnection resource, said programmable interconnection block multiplexes said input and output terminals of said programmable storage circuit onto one or more of said interconnection lines.
Claim 2
Dependent Claim
133 words
A programmable logic integrated circuit, comprising: a programmable logic circuit, said programmable logic circuit having programmable logic cells for configuring into a logic circuit; a programmable storage circuit, said programmable storage circuit being a storage element module configurable into one of a plurality of predetermined configurations; and a programmable interconnection resource for programmably interconnecting said programmable logic circuit and said programmable storage circuit, and wherein said programmable interconnection resource further comprises a switch matrix of interconnection lines and said programmable storage circuit comprises a plurality of input and output terminals, said integrated circuit further comprises a programmable interface interconnection block between said programmable storage circuit and said programmable interconnection resource, said programmable interconnection block multiplexes said input and output terminals of said programmable storage circuit onto one or more of said interconnection lines.
Claim 3
Dependent Claim
51 words
An integrated circuit as in claim 1, further comprises: a plurality of input and output terminals; and a programmable input resource for selectively coupling said input terminals of said integrated circuit to said input terminals of said programmable storage circuit, so as to provide input signals to said programmable storage circuit.
Claim 4
Dependent Claim
14 words
An integrated circuit as in claim 1, wherein said integrated circuit is in-system programmable.
Claim 5
Dependent Claim
18 words
An integrated circuit as in claim 1, wherein said integrated circuit is implemented using a non-volatile memory technology.
Claim 6
Dependent Claim
18 words
An integrated circuit as in claim 1, wherein said integrated circuit is implemented using a volatile memory technology.
Claim 7
Dependent Claim
16 words
An integrated circuit as in claim 1, wherein said programmable storage circuit comprises a memory array.
Claim 8
Dependent Claim
14 words
An integrated circuit as in claim 1, wherein said integrated circuit is in-system programmable.
Claim 9
Dependent Claim
18 words
An integrated circuit as in claim 1, wherein said integrated circuit is implemented using a non-volatile memory technology.
Claim 10
Dependent Claim
18 words
An integrated circuit as in claim 1, wherein said integrated circuit is implemented using a volatile memory technology.
Claim 11
Dependent Claim
18 words
An integrated circuit as in claim 1, wherein said programmable storage circuit comprises a programmably configurable memory array.
Claim 12
Dependent Claim
18 words
An integrated circuit as in claim 1, wherein said programmable storage circuit comprises a programmably configurable memory array.
Claim 13
Dependent Claim
18 words
An integrated circuit as in claim 1, wherein said programmable storage circuit comprises a programmably configurable memory array.
Claim 14
Dependent Claim
23 words
An integrated circuit as in claim 10, wherein said memory array has a programmable word size selected from a plurality of word sizes.
Claim 15
Dependent Claim
21 words
An integrated circuit as in claim 10, wherein said memory array can be programmably subdivided into one or more memory arrays.
Claim 16
Dependent Claim
16 words
An integrated circuit as in claim 10, wherein said memory array comprises a dual-port memory array.
Claim 17
Dependent Claim
25 words
An integrated circuit as in claim 15, further comprising a control circuit for accessing memory words in said dual-port memory array in a first-in-first-out manner.
Claim 18
Dependent Claim
26 words
An integrated circuit as in claim 16, further comprising a status signal logic circuit for indicating qualitatively the amount of valid data in said memory array.
Claim 19
Dependent Claim
28 words
An integrated circuit as in claim 17, wherein said control circuit comprises a read counter and a write counter for generating addresses to access said dual-port memory array.
Claim 20
Dependent Claim
18 words
An integrated circuit as in claim 1, wherein said programmable storage circuit comprises a programmably configurable memory array.
Claim 21
Dependent Claim
23 words
An integrated circuit as in claim 19, wherein said memory array has a programmable word size selected from a plurality of word sizes.
Claim 22
Dependent Claim
21 words
An integrated circuit as in claim 19, wherein said memory array can be programmably subdivided into one or more memory arrays.
Claim 23
Dependent Claim
16 words
An integrated circuit as in claim 19, wherein said memory array comprises a dual-port memory array.
Claim 24
Dependent Claim
25 words
An integrated circuit as in claim 19, further comprising a control circuit for accessing memory words in said dual-port memory array in a first-in-first-out manner.
Claim 25
Dependent Claim
26 words
An integrated circuit as in claim 20, further comprising a status signal logic circuit for indicating qualitatively the amount of valid data in said memory array.
Claim 26
Dependent Claim
28 words
An integrated circuit as in claim 24, wherein said control circuit comprises a read counter and a write counter for generating addresses to access said dual-port memory array.
Claim 27
Dependent Claim
17 words
An integrated circuit as in claim 1, wherein said programmable storage circuit comprises a plurality of registers.
Claim 28
Dependent Claim
28 words
An integrated circuit as in claim 26, wherein said programmable storage circuit further comprises a logic configuration circuit for configuring one of said registers into a shift register.
Claim 29
Dependent Claim
27 words
An integrated circuit as in claim 26, wherein said programmable storage circuit further comprises a logic configuration circuit for configuring one of said registers into a counter.
Claim 30
Dependent Claim
27 words
An integrated circuit as in claim 26, wherein said programmable storage circuit further comprises a logic configuration circuit for configuring one of said registers into a timer.
Claim 31
Dependent Claim
17 words
An integrated circuit as in claim 1, wherein said programmable storage circuit comprises a plurality of registers.
Claim 32
Dependent Claim
17 words
An integrated circuit as in claim 1, wherein said programmable storage circuit comprises a plurality of registers.
Claim 33
Dependent Claim
17 words
An integrated circuit as in claim 1, wherein said programmable storage circuit comprises a plurality of registers.
Claim 34
Dependent Claim
28 words
An integrated circuit as in claim 31, wherein said programmable storage circuit further comprises a logic configuration circuit for configuring one of said registers into a shift register.
Claim 35
Dependent Claim
27 words
An integrated circuit as in claim 31, wherein said programmable storage circuit further comprises a logic configuration circuit for configuring one of said registers into a counter.
Claim 36
Dependent Claim
27 words
An integrated circuit as in claim 31, wherein said programmable storage circuit further comprises a logic configuration circuit for configuring one of said registers into a timer.
Claim 37
Dependent Claim
17 words
An integrated circuit as in claim 1, wherein said programmable storage circuit comprises a plurality of counters.
Claim 38
Dependent Claim
17 words
An integrated circuit as in claim 1, wherein said programmable storage circuit comprises a plurality of counters.
Claim 39
Dependent Claim
17 words
An integrated circuit as in claim 1, wherein said programmable storage circuit comprises a plurality of counters.
Claim 40
Dependent Claim
23 words
An integrated circuit as in claim 35, said timer coupled to receive an initial value from a source external to said integrated circuit.
Claim 41
Dependent Claim
20 words
An integrated circuit as in claim 35, said timer coupled to receive an initial value from another of said registers.
Claim 42
Dependent Claim
16 words
An integrated circuit as in claim 35, said timer coupled to receive a programmable load value.
References Cited (Backward Citations)
JPS5755625A
Cited
US4706216A
Cited
US4831591A
Cited
US4855803A
Cited
US4872137A
Cited
EP0410759A2
Cited
US5280202A
Cited
EP0509376A2
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2001-11-09 | 2002-05-11 | 2002-11-10 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2005-11-09 | 2006-05-11 | 2006-11-10 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2009-11-09 | 2010-05-11 | 2010-11-10 | $7700.00 | Window Closed / Lapsed |