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US5834945A Expired / Lapsed US ⏱️ 0.0 years remaining

High speed temporary package and interconnect for testing semiconductor dice and method of fabrication

Assignee: Micron Technology Inc
•
Filing: 1996-12-31
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Granted: 1998-11-10
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Expires: 2016-12-31
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Abstract

Abstract An improved interconnect for semiconductor dice, a method for testing dice using the interconnect, and a method for fabricating the interconnect are provided. The interconnect includes dense arrays of contact members configured to establish temporary electrical communication with contact locations on a die under test. In addition, the interconnect includes patterns of multi level conductors formed on different levels of the substrate and separated by insulating layers. The multi level conductors can be formed with a higher density and with less cross talk than planar conductors to permit high speed testing of dice having a large number of bond pads. The interconnect can be configured for use with a temporary package for housing a single die for burn-in or other testing. Electrical paths between terminal contacts on the package and the multi level conductors on the interconnect can be formed by microbump tape having low resistance microbumps bonded to the multi level conductors.

Inventors

  • 👤 Salman Akram
  • 👤 Alan G. Wood
  • 👤 Warren M. Farnworth

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-02 09:01
CPC Classifications
G; G01; G01R; G01R1/00; G01R1/02; G01R1/04; G01R1/0408; G01R1/0433; G01R1/0483; G01R1/06; G01R1/067; G01R1/073; G01R1/07307; G01R1/0735

Claims Analysis

Total Claims: 37
Claim 1
Independent Claim 80 words
A temporary package for testing a semiconductor die comprising: a base adapted to retain the die, the base comprising a plurality of terminal contacts and an opening formed therein; an interconnect placed through the opening and bonded to the base, the interconnect comprising a plurality of first contacts configured to establish temporary electrical communication with a plurality of second contacts on the die, and a plurality of conductors in electrical communication with the first contacts and with the terminal contacts.
Claim 2
Dependent Claim 80 words
A temporary package for testing a semiconductor die comprising: a base adapted to retain the die, the base comprising a plurality of terminal contacts and an opening formed therein; an interconnect placed through the opening and bonded to the base, the interconnect comprising a plurality of first contacts configured to establish temporary electrical communication with a plurality of second contacts on the die, and a plurality of conductors in electrical communication with the first contacts and with the terminal contacts.
Claim 3
Dependent Claim 14 words
The package as claimed in claim 1 wherein the die comprises an unpackaged die.
Claim 4
Dependent Claim 15 words
The package as claimed in claim 1 wherein the die comprises a chip scale package.
Claim 5
Dependent Claim 21 words
The package as claimed in claim 1 wherein the interconnect is bonded to the base by TAB bonding or wire bonding.
Claim 6
Dependent Claim 97 words
A temporary package for testing a semiconductor die comprising: a base adapted to retain the die, the base comprising an opening and a plurality of terminal contacts and conductive traces in electrical communication with the terminal contacts; an interconnect placed through the opening and bonded to the base, the interconnect comprising a plurality of first contacts configured to establish temporary electrical communication with a plurality of second contacts on the die; and a tape comprising metal bumps bonded to the conductors on the interconnect and to the conductive traces on the base to establish electrical communication therebetween.
Claim 7
Dependent Claim 97 words
A temporary package for testing a semiconductor die comprising: a base adapted to retain the die, the base comprising an opening and a plurality of terminal contacts and conductive traces in electrical communication with the terminal contacts; an interconnect placed through the opening and bonded to the base, the interconnect comprising a plurality of first contacts configured to establish temporary electrical communication with a plurality of second contacts on the die; and a tape comprising metal bumps bonded to the conductors on the interconnect and to the conductive traces on the base to establish electrical communication therebetween.
Claim 8
Dependent Claim 28 words
The package as claimed in claim 5 wherein the second contacts comprise second metal bumps and the first contacts comprise indentations sized to retain the second metal bumps.
Claim 9
Dependent Claim 30 words
The package as claimed in claim 5 wherein the second contacts comprise second metal bumps and the first contacts comprise indentations with projections configured to penetrate the second metal bumps.
Claim 10
Dependent Claim 133 words
A temporary package for testing a bare semiconductor die or a chip scale package comprising: a base configured to retain the die or the chip scale package, the base comprising an opening, a plurality of terminal contacts connectable to test circuitry, and a plurality of conductive traces in electrical communication with the terminal contacts; an interconnect placed through the opening and bonded to the base, the interconnect comprising a plurality of first contacts comprising indentations configured to retain and establish temporary electrical communication with a plurality of metal bumps on the die or on the chip scale package, the indentations comprising conductive layers in electrical communication with a plurality of conductors on the interconnect; and a plurality of bonded connections between the conductive traces on the base and the conductors on the interconnect.
Claim 11
Dependent Claim 133 words
A temporary package for testing a bare semiconductor die or a chip scale package comprising: a base configured to retain the die or the chip scale package, the base comprising an opening, a plurality of terminal contacts connectable to test circuitry, and a plurality of conductive traces in electrical communication with the terminal contacts; an interconnect placed through the opening and bonded to the base, the interconnect comprising a plurality of first contacts comprising indentations configured to retain and establish temporary electrical communication with a plurality of metal bumps on the die or on the chip scale package, the indentations comprising conductive layers in electrical communication with a plurality of conductors on the interconnect; and a plurality of bonded connections between the conductive traces on the base and the conductors on the interconnect.
Claim 12
Dependent Claim 14 words
The package as claimed in claim 8 wherein the bonded connections comprise TAB tape.
Claim 13
Dependent Claim 19 words
The package as claimed in claim 8 wherein the indentations comprise penetrating projections configured to penetrate the metal bumps.
Claim 14
Dependent Claim 20 words
The package as claimed in claim 8 wherein the conductors comprise a plurality of connection pads for the bonded connections.
Claim 15
Dependent Claim 109 words
A temporary package for testing a chin scale package comprising: a package base configured to retain the chip scale package, the base comprising an opening; an interconnect placed through the opening and bonded to the base; a first contact and a second contact on the interconnect, each contact comprising an indentation with a conductive layer thereon configured to retain and establish electrical communication with a metal bump on the chip scale package; a first conductor on the interconnect located in a first plane in electrical communication with the first contact; and a second conductor on the interconnect located in a second plane in electrical communication with the second contact.
Claim 16
Dependent Claim 109 words
A temporary package for testing a chin scale package comprising: a package base configured to retain the chip scale package, the base comprising an opening; an interconnect placed through the opening and bonded to the base; a first contact and a second contact on the interconnect, each contact comprising an indentation with a conductive layer thereon configured to retain and establish electrical communication with a metal bump on the chip scale package; a first conductor on the interconnect located in a first plane in electrical communication with the first contact; and a second conductor on the interconnect located in a second plane in electrical communication with the second contact.
Claim 17
Dependent Claim 24 words
The package as claimed in claim 12 wherein the conductive layer comprises a material selected from the group consisting of metal and metal silicide.
Claim 18
Dependent Claim 20 words
The package as claimed in claim 12 wherein the indentation includes a projection configured to penetrate into the metal bump.
Claim 19
Dependent Claim 28 words
The package as claimed in claim 12 wherein an electrical path between the package base and the first and second conductors comprises metal bumps formed on microbump tape.
Claim 20
Dependent Claim 29 words
The interconnect as claimed in claim 12 wherein the first conductor and the second conductor include metal connection pads arranged in an array along a periphery of the interconnect.
Claim 21
Independent Claim 122 words
A system for testing a semiconductor die or a chip scale package comprising: a temporary package for retaining the die or the chip scale package, the temporary package comprising a base including an opening therein and a plurality of terminal contacts in electrical communication with a plurality of conductive traces; an interconnect placed through the opening and bonded to the base, the interconnect comprising a plurality of first contacts for establishing temporary electrical communication with a plurality of second contacts on the die or the chip scale package, and a plurality of conductors in electrical communication with the first contacts; and a tape with metal bumps thereon, the metal bumps bonded to the conductors and to the conductive traces on the base.
Claim 22
Independent Claim 122 words
A system for testing a semiconductor die or a chip scale package comprising: a temporary package for retaining the die or the chip scale package, the temporary package comprising a base including an opening therein and a plurality of terminal contacts in electrical communication with a plurality of conductive traces; an interconnect placed through the opening and bonded to the base, the interconnect comprising a plurality of first contacts for establishing temporary electrical communication with a plurality of second contacts on the die or the chip scale package, and a plurality of conductors in electrical communication with the first contacts; and a tape with metal bumps thereon, the metal bumps bonded to the conductors and to the conductive traces on the base.
Claim 23
Dependent Claim 25 words
The system as claimed in claim 17 further comprising a force applying mechanism for biasing the die or the chip scale package against the interconnect.
Claim 24
Independent Claim 123 words
A method for testing a semiconductor die comprising: providing a temporary package for the die comprising an opening, a plurality of terminal contacts, and a plurality of conductive traces in electrical communication with the terminal contacts; providing an interconnect comprising a plurality of first contacts configured to make electrical contact with a plurality of second contacts on the die, the first contacts in electrical communication with conductors formed on the interconnect; providing a tape with a plurality of metal bumps; placing the interconnect through the opening; bonding the metal bumps on the tape to the conductive traces and to the conductors to establish electrical communication therebetween; and applying test signals through the terminal contacts, conductive traces, conductors and first contacts to the die.
Claim 25
Independent Claim 123 words
A method for testing a semiconductor die comprising: providing a temporary package for the die comprising an opening, a plurality of terminal contacts, and a plurality of conductive traces in electrical communication with the terminal contacts; providing an interconnect comprising a plurality of first contacts configured to make electrical contact with a plurality of second contacts on the die, the first contacts in electrical communication with conductors formed on the interconnect; providing a tape with a plurality of metal bumps; placing the interconnect through the opening; bonding the metal bumps on the tape to the conductive traces and to the conductors to establish electrical communication therebetween; and applying test signals through the terminal contacts, conductive traces, conductors and first contacts to the die.
Claim 26
Dependent Claim 25 words
The method as claimed in claim 19 wherein the second contacts comprise second metal bumps and the first contacts comprise indentations covered with conductive layers.
Claim 27
Dependent Claim 13 words
The method as claimed in claim 19 wherein the tape comprises TAB tape.
Claim 28
Dependent Claim 19 words
The method as claimed in claim 19 wherein the first contacts comprise penetrating projections for penetrating the second contacts.
Claim 29
Dependent Claim 38 words
The method as claimed in claim 19 wherein the second contacts comprise second metal bumps and the first contacts comprise indentations configured to retain the second metal bumps and penetrating projections configured to penetrate the second metal bumps.
Claim 30
Independent Claim 119 words
A method for testing a chip scale package comprising: providing a temporary package for packaging the chip scale package, the temporary package comprising an opening and a plurality of terminal contacts in electrical communication with a plurality of conductive traces; providing an interconnect comprising a plurality of first contacts in electrical communication with a plurality of conductors, the first contacts comprising indentations with conductive layers thereon configured to retain and electrically engage bumped contacts on the chip scale package; placing the interconnect through the opening and bonding the conductors to the conductive traces to establish electrical communication therebetween; and assembling the chip scale package in the temporary package with the first contacts in electrical communication with the bumped contacts.
Claim 31
Independent Claim 119 words
A method for testing a chip scale package comprising: providing a temporary package for packaging the chip scale package, the temporary package comprising an opening and a plurality of terminal contacts in electrical communication with a plurality of conductive traces; providing an interconnect comprising a plurality of first contacts in electrical communication with a plurality of conductors, the first contacts comprising indentations with conductive layers thereon configured to retain and electrically engage bumped contacts on the chip scale package; placing the interconnect through the opening and bonding the conductors to the conductive traces to establish electrical communication therebetween; and assembling the chip scale package in the temporary package with the first contacts in electrical communication with the bumped contacts.
Claim 32
Dependent Claim 18 words
The method as claimed in claim 24 wherein bonding the conductors to the conductive traces comprises TAB bonding.
Claim 33
Independent Claim 80 words
A method for fabricating a temporary package for testing a semiconductor die, comprising: providing a base comprising an opening, a plurality of terminal contacts and a plurality of conductive traces in electrical communication with the terminal contacts; providing an interconnect comprising a plurality of first contacts in electrical communication with a plurality of conductors, the first contacts configured to electrically engage second contacts on the die; placing the interconnect through the opening; and bonding the conductive traces to the conductors.
Claim 34
Independent Claim 80 words
A method for fabricating a temporary package for testing a semiconductor die, comprising: providing a base comprising an opening, a plurality of terminal contacts and a plurality of conductive traces in electrical communication with the terminal contacts; providing an interconnect comprising a plurality of first contacts in electrical communication with a plurality of conductors, the first contacts configured to electrically engage second contacts on the die; placing the interconnect through the opening; and bonding the conductive traces to the conductors.
Claim 35
Dependent Claim 12 words
The method as claimed in claim 26 wherein bonding comprises TAB bonding.
Claim 36
Dependent Claim 20 words
The method as claimed in claim 26 wherein the first contacts comprise indentations and the second contacts comprise metal bumps.
Claim 37
Dependent Claim 15 words
The method as claimed in claim 26 wherein the die comprises a chip scale package.

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 2001-11-09 2002-05-11 2002-11-10 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2005-11-09 2006-05-11 2006-11-10 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2009-11-09 2010-05-11 2010-11-10 $7700.00 Window Closed / Lapsed

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