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US5834800A
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Heterojunction bipolar transistor having mono crystalline SiGe intrinsic base and polycrystalline SiGe and Si extrinsic base regions
Assignee: Bell Semiconductor LLC
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Filing: 1996-03-04
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Granted: 1998-11-10
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Expires: 2016-03-04
Abstract
Abstract A heterojunction bipolar transistor in an integrated circuit has intrinsic and extrinsic base portions. The intrinsic base portion substantially comprises epitaxial silicon-germanium alloy. The extrinsic base portion substantially comprises polycrystalline material, and contains a distribution of ion-implanted impurities. An emitter overlies the intrinsic base portion, and a spacer at least partially overlies the emitter. The spacer overhangs the extrinsic base portion by at least a distance characteristic of lateral straggle of the ion-implanted impurities.
Inventors
- 👤 Bahram Jalali-Farahani
- 👤 Clifford Alan King
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-28 12:27
CPC Classifications
H; H10; H10D; H10D10/00; H10D10/01; H10D10/021; H10D10/80; H10D10/821; H10D10/891
Claims Analysis
Total Claims: 6
Claim 1
Independent Claim
148 words
An integrated electronic device comprising a heterojunction bipolar transistor, said transistor comprising a collector, base, and emitter of respective first, second, and first conductivity types, wherein: (a) the base comprises an intrinsic base and an extrinsic base; (b) the emitter and collector substantially comprise single-crystalline silicon; (c) the intrinsic base is included between the emitter and collector and substantially comprises epitaxial silicon-germanium alloy; (d) the extrinsic base laterally adjoins the intrinsic base and the emitter, and substantially comprises polycrystalline silicon and polycrystalline silicon-germanium alloy; (e) the extrinsic base comprises ion-implanted impurities of the second conductivity type; (f) the emitter is partially overlain by a dielectric spacer that partially overhangs the extrinsic base by an overhang length at least equal to a distance of lateral straggle characteristic of the ion-implanted impurities; and (g) said overhang length is at least about 150 nm, and not more than about 400 nm.
Claim 2
Dependent Claim
148 words
An integrated electronic device comprising a heterojunction bipolar transistor, said transistor comprising a collector, base, and emitter of respective first, second, and first conductivity types, wherein: (a) the base comprises an intrinsic base and an extrinsic base; (b) the emitter and collector substantially comprise single-crystalline silicon; (c) the intrinsic base is included between the emitter and collector and substantially comprises epitaxial silicon-germanium alloy; (d) the extrinsic base laterally adjoins the intrinsic base and the emitter, and substantially comprises polycrystalline silicon and polycrystalline silicon-germanium alloy; (e) the extrinsic base comprises ion-implanted impurities of the second conductivity type; (f) the emitter is partially overlain by a dielectric spacer that partially overhangs the extrinsic base by an overhang length at least equal to a distance of lateral straggle characteristic of the ion-implanted impurities; and (g) said overhang length is at least about 150 nm, and not more than about 400 nm.
Claim 3
Dependent Claim
186 words
An integrated electronic device comprising a heterojunction bipolar transistor, said transistor comprising a collector, base, and emitter of respective first, second, and first conductivity types, wherein: (a) the base comprises an intrinsic base and an extrinsic base; (b) the emitter and collector substantially comprise single-crystalline silicon; (c) the intrinsic base is included between the emitter and collector and substantially comprises epitaxial silicon-germanium alloy; (d) the extrinsic base laterally adjoins the intrinsic base and the emitter, and substantially comprises polycrystalline silicon and polycrystalline silicon-germanium alloy; (e) the extrinsic base comprises ion-implanted impurities of the second conductivity type; (f) the emitter is partially overlain by a dielectric spacer that partially overhangs the extrinsic base by an overhang length at least equal to a distance of lateral straggle characteristic of the ion-implanted impurities; (g) there is a p-n junction between the extrinsic base and the emitter, and there is an interface between polycrystalline silicon and single-crystalline silicon approximately where the extrinsic base adjoins the emitter; and (h) said junction lies on the single-crystalline side of said interface at a distance of about 500 Å or less from said interface.
Claim 4
Dependent Claim
186 words
An integrated electronic device comprising a heterojunction bipolar transistor, said transistor comprising a collector, base, and emitter of respective first, second, and first conductivity types, wherein: (a) the base comprises an intrinsic base and an extrinsic base; (b) the emitter and collector substantially comprise single-crystalline silicon; (c) the intrinsic base is included between the emitter and collector and substantially comprises epitaxial silicon-germanium alloy; (d) the extrinsic base laterally adjoins the intrinsic base and the emitter, and substantially comprises polycrystalline silicon and polycrystalline silicon-germanium alloy; (e) the extrinsic base comprises ion-implanted impurities of the second conductivity type; (f) the emitter is partially overlain by a dielectric spacer that partially overhangs the extrinsic base by an overhang length at least equal to a distance of lateral straggle characteristic of the ion-implanted impurities; (g) there is a p-n junction between the extrinsic base and the emitter, and there is an interface between polycrystalline silicon and single-crystalline silicon approximately where the extrinsic base adjoins the emitter; and (h) said junction lies on the single-crystalline side of said interface at a distance of about 500 Å or less from said interface.
Claim 5
Dependent Claim
186 words
An integrated electronic device comprising a heterojunction bipolar transistor, said transistor comprising a collector, base, and emitter of respective first, second, and first conductivity types, wherein: (a) the base comprises an intrinsic base and an extrinsic base; (b) the emitter and collector substantially comprise single-crystalline silicon; (c) the intrinsic base is included between the emitter and collector and substantially comprises epitaxial silicon-germanium alloy; (d) the extrinsic base laterally adjoins the intrinsic base and the emitter, and substantially comprises polycrystalline silicon and polycrystalline silicon-germanium alloy; (e) the extrinsic base comprises ion-implanted impurities of the second conductivity type; (f) the emitter is partially overlain by a dielectric spacer that partially overhangs the extrinsic base by an overhang length at least equal to a distance of lateral straggle characteristic of the ion-implanted impurities; (g) there is a p-n junction between the extrinsic base and the emitter, and there is an interface between polycrystalline silicon and single-crystalline silicon approximately where the extrinsic base adjoins the emitter; and (h) said junction lies on the single-crystalline side of said interface at a distance of about 200 Å or less from said interface.
Claim 6
Dependent Claim
186 words
An integrated electronic device comprising a heterojunction bipolar transistor, said transistor comprising a collector, base, and emitter of respective first, second, and first conductivity types, wherein: (a) the base comprises an intrinsic base and an extrinsic base; (b) the emitter and collector substantially comprise single-crystalline silicon; (c) the intrinsic base is included between the emitter and collector and substantially comprises epitaxial silicon-germanium alloy; (d) the extrinsic base laterally adjoins the intrinsic base and the emitter, and substantially comprises polycrystalline silicon and polycrystalline silicon-germanium alloy; (e) the extrinsic base comprises ion-implanted impurities of the second conductivity type; (f) the emitter is partially overlain by a dielectric spacer that partially overhangs the extrinsic base by an overhang length at least equal to a distance of lateral straggle characteristic of the ion-implanted impurities; (g) there is a p-n junction between the extrinsic base and the emitter, and there is an interface between polycrystalline silicon and single-crystalline silicon approximately where the extrinsic base adjoins the emitter; and (h) said junction lies on the single-crystalline side of said interface at a distance of about 200 Å or less from said interface.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2001-11-09 | 2002-05-11 | 2002-11-10 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2005-11-09 | 2006-05-11 | 2006-11-10 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2009-11-09 | 2010-05-11 | 2010-11-10 | $7700.00 | Window Closed / Lapsed |