Patent US5825073A successfully refreshed from Google Patents.
US5825073A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Electronic component for an integrated circuit
Assignee: Nokia of America Corp
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Filing: 1997-05-27
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Granted: 1998-10-20
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Expires: 2017-05-27
Abstract
Abstract A method for making a metal-to-metal capacitor for an integrated circuit includes forming a layer of titanium/titanium nitride on a polysilicon which has been patterned with interlevel dielectrics. A capacitor dielectric is then deposited, followed by patterning with photoresist to delineate the capacitor, etching to remove extraneous dielectric, deposition of aluminum, further patterning and etching to define the capacitor and access area, and removal of photoresist.
Inventors
- 👤 Joseph Rudolph Radosevich
- 👤 Ranbir Singh
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-09 03:09
CPC Classifications
H; H10; H10B; H10B12/00; H10D; H10D1/00; H10D1/60; H10D1/68; Y; Y10; Y10S; Y10S148/00; Y10S148/014
Claims Analysis
Total Claims: 12
Claim 1
Independent Claim
311 words
An electronic component for an integrated circuit, which comprises: a) a planar first conductive means for conducting an electric charge; b) an interlevel dielectric deposited on said planar first conductive means, said interlevel dielectric including first and second windows extending down to said planar first conductive means, each of said first and second windows being at least partially defined by at least one respective side wall oriented transverse to the planar orientation of said planar first conductive means, said planar first conductive means extending between said first and second windows for transferring an electrical charge therebetween; c) a second conductive means defining a capacitor bottom plate formed in said first window from a layer of first metal and a layer of conductive etch stop in contact with said layer of first metal, said layer of first metal being in electrical contact with said planar first conductive means and extending over said respective side wall of said first window; d) a third conductive means formed in said second window from a layer of said first metal and a layer of said conductive etch stop in contact with said layer of first metal, said layer of first metal of said third conductive means being in electrical contact with said planar first conductive means and extending over the respective wall of said second window, said second and third conductive means being spaced apart from each other; e) a layer of capacitor dielectric deposited over said layer of conductive etch stop of said second conductive means; f) a fourth conductive means formed in said first window from a layer of second metal deposited over said capacitor dielectric of said second conductive means; and g) a fifth conductive means formed in said second window from a layer of second metal deposited over and in electrical contact with said conductive etch stop of said third conductive means.
Claim 2
Dependent Claim
311 words
An electronic component for an integrated circuit, which comprises: a) a planar first conductive means for conducting an electric charge; b) an interlevel dielectric deposited on said planar first conductive means, said interlevel dielectric including first and second windows extending down to said planar first conductive means, each of said first and second windows being at least partially defined by at least one respective side wall oriented transverse to the planar orientation of said planar first conductive means, said planar first conductive means extending between said first and second windows for transferring an electrical charge therebetween; c) a second conductive means defining a capacitor bottom plate formed in said first window from a layer of first metal and a layer of conductive etch stop in contact with said layer of first metal, said layer of first metal being in electrical contact with said planar first conductive means and extending over said respective side wall of said first window; d) a third conductive means formed in said second window from a layer of said first metal and a layer of said conductive etch stop in contact with said layer of first metal, said layer of first metal of said third conductive means being in electrical contact with said planar first conductive means and extending over the respective wall of said second window, said second and third conductive means being spaced apart from each other; e) a layer of capacitor dielectric deposited over said layer of conductive etch stop of said second conductive means; f) a fourth conductive means formed in said first window from a layer of second metal deposited over said capacitor dielectric of said second conductive means; and g) a fifth conductive means formed in said second window from a layer of second metal deposited over and in electrical contact with said conductive etch stop of said third conductive means.
Claim 3
Dependent Claim
33 words
The electrical component of claim 1 wherein the planar first conductive means comprises a layer of material selected from the group consisting of conductive polysilicon, aluminum copper, silver, titanium, gold, platinum, and palladium.
Claim 4
Dependent Claim
18 words
The electrical component of claim 2 wherein the planar first conductive means comprises a layer of conductive polysilicon.
Claim 5
Dependent Claim
25 words
The electrical component of claim 1 wherein the first metal is selected from the group consisting of aluminum, copper, silver, titanium, gold, platinum, and palladium.
Claim 6
Dependent Claim
12 words
The electrical component of claim 1 wherein the first metal is titanium.
Claim 7
Dependent Claim
14 words
The electrical component of claim 5 wherein the conductive etch stop comprises titanium nitride.
Claim 8
Dependent Claim
12 words
The electrical component of claim 1 wherein the second metal is aluminum.
Claim 9
Dependent Claim
26 words
The electrical component of claim 1 wherein the capacitor dielectric comprises a layer of material selected from the group consisting of silicon dioxide and silicon nitride.
Claim 10
Dependent Claim
17 words
The electrical component of claim 1 wherein the interlevel dielectric comprises a patterned layer of silicon dioxide.
Claim 11
Dependent Claim
20 words
The electrical component of claim 1 wherein the planar first conductive means is positioned on a layer of field oxide.
Claim 12
Dependent Claim
19 words
The electrical component of claim 10 wherein the layer of field oxide is formed on a layer of silicon.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2001-10-19 | 2002-04-20 | 2002-10-20 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2005-10-19 | 2006-04-20 | 2006-10-20 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2009-10-19 | 2010-04-20 | 2010-10-20 | $7700.00 | Window Closed / Lapsed |