US5811340A
Expired / Lapsed
US
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Metal oxide semiconductor field effect transistor and method of manufacturing the same
Assignee: Intellectual Ventures II LLC
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Filing: 1997-05-16
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Granted: 1998-09-22
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Expires: 2017-05-16
Abstract
Abstract A MOSFET includes a semiconductor substrate of a first conductivity type including a field region and an active region; a gate insulating film on a portion of the active region, the gate insulating film having two edge parts and a mid-part, the two edge parts being thicker than the mid-part; a gate electrode on the gate insulating film; sidewall spacers on the sides of the gate electrode and the gate insulating film; heavily doped regions of a second conductivity type in the semiconductor substrate under the two edge parts of the gate insulating film; normally doped regions of the second conductivity type in the semiconductor substrate on both sides of the gate insulating film; lightly doped regions of the second conductivity type in the semiconductor substrate on the sides of the sidewall spacers; and doped regions of the first conductivity type below the normally doped region of the second conductivity type under the sidewall spacers.
Inventors
- 👤 Soon Duk Park
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-28 15:14
CPC Classifications
H; H10; H10D; H10D30/00; H10D30/60; H10D30/01; H10D30/021; H10D30/027; H10D30/0223; H10D30/0225; H10D30/601; H10D62/00; H10D62/10; H10D62/17; H10D62/351; H10D62/357; H10D62/364; H10D62/371; H10D64/00; H10D64/20; H10D64/27; H10D64/311; H10D64/411; H10D64/511; H10D64/514; H10D64/516; H10P; H10P30/00; H10P30/20; H10P30/22; H10P30/221; H10P30/222
Claims Analysis
Total Claims: 18
Claim 1
Independent Claim
247 words
A method of manufacturing a MOSFET, comprising the steps of: forming a first insulating film on a semiconductor substrate of a first conductivity type; forming a second insulating film on the first insulating film; selectively removing the second insulating film to expose a portion of the first insulating film including two edge parts and a mid-part; forming first sidewall spacers on the sides of the second insulating film above the two edge parts; forming a gate electrode on the first insulating film including the first sidewall spacers; forming heavily doped regions of a second conductivity type in the semiconductor substrate on the sides of the mid-part, through a tilted ion implantation process using the gate electrode as a mask; forming normally doped regions of the second conductivity type in the semiconductor substrate on the sides of the gate electrode, through an ion implantation process using the gate electrode as a mask; forming second sidewall spacers on the sides of the gate electrode and the first sidewall spacers; forming lightly doped regions of the second conductivity type in the semiconductor substrate on the sides of the second sidewall spacers, through an ion implantation process using the second sidewall spacers and the gate electrode as a mask; and forming doped regions of the first conductivity type below the normally doped regions of the second conductivity type under the second sidewall spacers, through a tilted ion implantation process using the second sidewall spacers and the gate electrode as a mask.
Claim 2
Independent Claim
247 words
A method of manufacturing a MOSFET, comprising the steps of: forming a first insulating film on a semiconductor substrate of a first conductivity type; forming a second insulating film on the first insulating film; selectively removing the second insulating film to expose a portion of the first insulating film including two edge parts and a mid-part; forming first sidewall spacers on the sides of the second insulating film above the two edge parts; forming a gate electrode on the first insulating film including the first sidewall spacers; forming heavily doped regions of a second conductivity type in the semiconductor substrate on the sides of the mid-part, through a tilted ion implantation process using the gate electrode as a mask; forming normally doped regions of the second conductivity type in the semiconductor substrate on the sides of the gate electrode, through an ion implantation process using the gate electrode as a mask; forming second sidewall spacers on the sides of the gate electrode and the first sidewall spacers; forming lightly doped regions of the second conductivity type in the semiconductor substrate on the sides of the second sidewall spacers, through an ion implantation process using the second sidewall spacers and the gate electrode as a mask; and forming doped regions of the first conductivity type below the normally doped regions of the second conductivity type under the second sidewall spacers, through a tilted ion implantation process using the second sidewall spacers and the gate electrode as a mask.
Claim 3
Dependent Claim
32 words
The method as claimed in claim 1, wherein the first insulating film is formed by sequentially performing an oxidation of the semiconductor substrate, a nitridation in N 2 O and a reoxidation.
Claim 4
Dependent Claim
21 words
The method as claimed in claim 1, wherein the second insulating film is formed of either an oxide or a nitride.
Claim 5
Dependent Claim
23 words
The method as claimed in claim 1, wherein the first and second sidewall spacers are formed of either an oxide or a nitride.
Claim 6
Dependent Claim
23 words
The method as claimed in claim 1, wherein the first sidewall spacers are formed on the edge parts of the first insulating film.
Claim 7
Dependent Claim
31 words
The method as claimed in claim 1, wherein the gate electrode is formed of a material selected from the group consisting of a polysilicon, a silicide and a high refractory metal.
Claim 8
Dependent Claim
25 words
The method as claimed in claim 1, wherein the tilted ion implantation processes are performed with an implantation angle in the range of about 30°˜70°.
Claim 9
Dependent Claim
38 words
The method as claimed in claim 1, wherein the normally doped regions of the second conductivity type and the doped regions of the first conductivity type are formed by an ion implantation process with a vertical implantation angle.
Claim 10
Dependent Claim
32 words
The method as claimed in claim 1, further comprising an ion implantation process for preventing punchthrough and an ion implantation process for adjusting a threshold voltage, after forming the first sidewall spacers.
Claim 11
Independent Claim
241 words
A method of manufacturing a MOSFET, comprising the steps of: forming a first insulating film on a semiconductor substrate of a first conductivity type; forming a second insulating film on the first insulating film; patterning the second insulating film to form second insulating film patterns, the second insulating film patterns being on portions of the first insulating film; forming a gate electrode on the second insulating film patterns and on the first insulating film between the second insulating film patterns; forming heavily doped regions of a second conductivity type in the semiconductor substrate below and on the sides of the second insulating film patterns, through a tilted ion implantation process using the gate electrode as a mask; forming normally doped regions of the second conductivity type in the semiconductor substrate on the sides of the gate electrode, through an ion implantation process using the gate electrode as a mask; forming sidewall spacers on the sides of the gate electrode and the second insulating film pattern; forming lightly doped regions of the second conductivity type in the semiconductor substrate on the sides of the sidewall spacers, through an ion implantation process using the sidewall spacers and the gate electrode as a mask; and forming doped regions of the first conductivity type below the normally doped regions of the second conductivity type under the sidewall spacers, through a tilted ion implantation process using the sidewall spacers and the gate electrode as a mask.
Claim 12
Independent Claim
241 words
A method of manufacturing a MOSFET, comprising the steps of: forming a first insulating film on a semiconductor substrate of a first conductivity type; forming a second insulating film on the first insulating film; patterning the second insulating film to form second insulating film patterns, the second insulating film patterns being on portions of the first insulating film; forming a gate electrode on the second insulating film patterns and on the first insulating film between the second insulating film patterns; forming heavily doped regions of a second conductivity type in the semiconductor substrate below and on the sides of the second insulating film patterns, through a tilted ion implantation process using the gate electrode as a mask; forming normally doped regions of the second conductivity type in the semiconductor substrate on the sides of the gate electrode, through an ion implantation process using the gate electrode as a mask; forming sidewall spacers on the sides of the gate electrode and the second insulating film pattern; forming lightly doped regions of the second conductivity type in the semiconductor substrate on the sides of the sidewall spacers, through an ion implantation process using the sidewall spacers and the gate electrode as a mask; and forming doped regions of the first conductivity type below the normally doped regions of the second conductivity type under the sidewall spacers, through a tilted ion implantation process using the sidewall spacers and the gate electrode as a mask.
Claim 13
Dependent Claim
32 words
The method as claimed in claim 10, wherein the first insulating film is formed by sequentially performing an oxidation of the semiconductor substrate, a nitridation in N 2 O and a reoxidation.
Claim 14
Dependent Claim
21 words
The method as claimed in claim 10, wherein the second insulating film is formed of either an oxide or a nitride.
Claim 15
Dependent Claim
23 words
The method as claimed in claim 10, wherein the first and second sidewall spacers are formed of either an oxide or a nitride.
Claim 16
Dependent Claim
31 words
The method as claimed in claim 10, wherein the gate electrode is formed of a material selected from the group consisting of a polysilicon, a silicide and a high refractory metal.
Claim 17
Dependent Claim
25 words
The method as claimed in claim 10, wherein the tilted ion implantation processes are performed with an implantation angle in the range of about 30°˜70°.
Claim 18
Dependent Claim
32 words
The method as claimed in claim 10, further comprising an ion implantation process for preventing punchthrough and an ion implantation process for adjusting a threshold voltage, after forming the first sidewall spacers.
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| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
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| 3.5 Years (Year 4) | 2001-09-21 | 2002-03-23 | 2002-09-22 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2005-09-21 | 2006-03-23 | 2006-09-22 | $3760.00 | Window Closed / Lapsed |
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