US5804004A
Expired / Lapsed
US
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Stacked devices for multichip modules
Assignee: nCHIP Inc
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Filing: 1996-05-24
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Granted: 1998-09-08
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Expires: 2016-05-24
Abstract
Abstract A method for fabricating a multichip module includes attaching a first integrated circuit to a silicon circuit board. Bonding pads on the first integrated circuit are wire-bonded to a first set of contacts on the circuit board. A second integrated circuit is adhesively attached onto the top of the first integrated circuit. The second integrated circuit includes a recessed bottom surface to provide an overhang over the first integrated circuit which exposes the bonding pads on the top surface of the first integrated circuit. Then bonding pads on the second integrated circuit are wire-bonded to a second set of contacts on the circuit board.
Inventors
- 👤 David B. Tuckerman
- 👤 Nicholas E. Brathwaite
- 👤 Paul Marella
- 👤 Kirk Flatow
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-03 15:10
CPC Classifications
H; H10; H10D; H10D62/00; H10D62/10; H10D62/117; H10W; H10W90/00; H10W72/00; H10W72/01; H10W72/013; H10W72/01331; H10W72/071; H10W72/0711; H10W72/07141; H10W72/073; H10W72/07331; H10W72/07337; H10W72/075; H10W72/07531; H10W72/07532; H10W72/07533; H10W72/07551; H10W72/07554; H10W72/30; H10W72/351; H10W72/353; H10W72/354; H10W72/50; H10W72/531; H10W72/5363; H10W72/541; H10W72/5445; H10W72/5449; H10W72/547; H10W72/5473; H10W72/551; H10W72/552; H10W72/5522; H10W72/5524; H10W72/851; H10W72/874; H10W72/884; H10W90/20; H10W90/284; H10W90/701; H10W90/731; H10W90/732; H10W90/734; H10W90/751; H10W90/754; Y; Y10; Y10T; Y10T156/00; Y10T156/10; Y10T156/1089; Y10T156/1092; Y10T156/1093; Y10T29/00; Y10T29/49; Y10T29/49002; Y10T29/49117; Y10T29/49124; Y10T29/49128; Y10T29/49155; Y10T29/49162
Claims Analysis
Total Claims: 22
Claim 1
Independent Claim
141 words
A method for fabricating a multichip module comprising the steps of: attaching a first integrated circuit having a bonding pad region to a surface of a silicon circuit board; wire bonding a conductor between said bonding pad region of said first integrated circuit and a first set of bond pads located on said circuit board; placing a layer of adhesive atop said first integrated circuit; placing a second integrated circuit having a recessed bottom surface along a bottom edge of said second integrated circuit atop said layer of adhesive wherein at least a portion of said recessed bottom surface of said second integrated circuit overhangs said bonding pad region of said first integrated circuit; and wire bonding a conductor between said bonding pad region of said second integrated circuit and a second set of bond pads located on said circuit board.
Claim 2
Independent Claim
141 words
A method for fabricating a multichip module comprising the steps of: attaching a first integrated circuit having a bonding pad region to a surface of a silicon circuit board; wire bonding a conductor between said bonding pad region of said first integrated circuit and a first set of bond pads located on said circuit board; placing a layer of adhesive atop said first integrated circuit; placing a second integrated circuit having a recessed bottom surface along a bottom edge of said second integrated circuit atop said layer of adhesive wherein at least a portion of said recessed bottom surface of said second integrated circuit overhangs said bonding pad region of said first integrated circuit; and wire bonding a conductor between said bonding pad region of said second integrated circuit and a second set of bond pads located on said circuit board.
Claim 3
Independent Claim
98 words
A method for fabricating a multichip module comprising the steps of: attaching a first integrated circuit having a bonding pad region to a circuit board having first and second sets of bonding pads; wire bonding a conductor between said bonding pad region of said first integrated circuit and said first set of bonding pads located on said circuit board; adhering a second integrated circuit having a recessed portion along a bottom edge atop of said first integrated circuit so that said recessed portion of said second integrated circuit overhangs said bonding pad region of said first integrated circuit.
Claim 4
Independent Claim
98 words
A method for fabricating a multichip module comprising the steps of: attaching a first integrated circuit having a bonding pad region to a circuit board having first and second sets of bonding pads; wire bonding a conductor between said bonding pad region of said first integrated circuit and said first set of bonding pads located on said circuit board; adhering a second integrated circuit having a recessed portion along a bottom edge atop of said first integrated circuit so that said recessed portion of said second integrated circuit overhangs said bonding pad region of said first integrated circuit.
Claim 5
Dependent Claim
48 words
The method of claim 2 wherein said second integrated circuit includes a bonding pad region, said method further comprising the step of wire bonding a conductor between said bonding pad region of said second integrated circuit and said second set of bonding pads located on said circuit board.
Claim 6
Dependent Claim
108 words
The method for fabricating a multichip module of claim 3, wherein said circuit board further comprises a third set of bonding pads, the method further comprising the steps of: attaching a third integrated circuit atop of said second integrated circuit wherein a portion of said third integrated circuit overhangs said bonding pad region of said second integrated circuit, said third integrated circuit including a bonding pad region and said second and third integrated circuits are attached in a substantially parallel orientation; and wire bonding a conductor between said bonding pad region of said third integrated circuit and said third set of bonding pads located on said circuit board.
Claim 7
Dependent Claim
65 words
The method for fabricating a multichip module of claim 3, wherein said step of wire-bonding a conductor between said bonding pad region of said first integrated circuit and said first set of bonding pads comprises the step of wire bonding an insulated wire between said bonding pad region of said first integrated circuit and said first set of bonding pads located on said circuit board.
Claim 8
Dependent Claim
62 words
The method for fabricating a multichip module of claim 3, wherein said step of wire-bonding a conductor between said bonding pad region of said second integrated circuit and said second set of bonding pads comprises forward wedge bonding a conductor between said bonding pad region of said second integrated circuit and said second set of bonding pads located on said circuit board.
Claim 9
Dependent Claim
93 words
The method for fabricating a multichip module of claim 3, further comprising the steps of: testing said first and said second integrated circuits; pulling wire leads associated with a defective one of said first and said second integrated circuits; adhesively attaching a replacement integrated circuit atop of said second integrated circuit and wire -- bonding a conductor between said replacement integrated circuit and a set of engineering change bond pads wherein said engineering change bond pads comprise a union of electrical networks encompassed by said first and said second set of bond pads.
Claim 10
Dependent Claim
64 words
The method for fabricating a multichip module of claim 4, wherein said step of wire -- bonding a conductor between said bonding pad region of said third integrated circuit and said third set of bonding pads comprises forward wedge bonding a conductor between said bonding pad region of said third integrated circuit and said third set of bonding pads located on said circuit board.
Claim 11
Dependent Claim
49 words
The method for fabricating a multichip module of claim 4, wherein said step of attaching a third integrated circuit atop of said second integrated circuit comprises the step of adhesively attaching said third integrated circuit atop of said second integrated circuit using a thermally conducting and electrically nonconducting adhesive.
Claim 12
Dependent Claim
46 words
The method for fabricating a multichip module of claim 4, wherein said step of attaching a third integrated circuit atop of said second integrated circuit comprises the step of adhesively attaching said third integrated circuit atop of said second integrated circuit using an electrically conducting adhesive.
Claim 13
Dependent Claim
23 words
The method for fabricating a multichip module of claim 2, further comprising the step of beveling an edge of said second integrated circuit.
Claim 14
Dependent Claim
68 words
The method for fabricating a multichip module of claim 2, wherein said step of wire -- bonding a conductor between said bonding pad region of said first integrated circuit and said first set of bonding pads comprises the step of reverse wire wedge bonding a conductor between said bonding pad region of said first integrated circuit and said first set of bonding pads located on said circuit board.
Claim 15
Dependent Claim
49 words
The method for fabricating a multichip module of claim 2, wherein said step of attaching a second integrated circuit atop of said first integrated circuit comprises the step of adhesively attaching said second integrated circuit atop of said first integrated circuit using a thermally conducting and electrically nonconducting adhesive.
Claim 16
Dependent Claim
46 words
The method for fabricating a multichip module of claim 2, wherein said step of attaching a second integrated circuit atop of said first integrated circuit comprises the step of adhesively attaching said second integrated circuit atop of said first integrated circuit using an electrically conducting adhesive.
Claim 17
Independent Claim
228 words
A method for fabricating a multichip module comprising the steps of: adhesively attaching a first integrated circuit having a bonding pad region located on an upper surface of said first integrated circuit and a bottom surface having a portion under said bonding pad region on said upper surface of said first integrated circuit partially cut away to a circuit board having first and second sets of bonding pads so that said first integrated circuit is oriented substantially parallel to said circuit board; wire bonding a conductor between said bonding pad region of said first integrated circuit and said first set of bonding pads located on said circuit board; thereafter, adhesively attaching a second integrated circuit having a bonding pad region located on an upper surface of said second integrated circuit and a bottom surface having a portion under said bonding pad region on said upper surface of said first integrated circuit partially cut away to said upper surface of said first integrated circuit so that said partially cut away portion of said second integrated circuit overhangs said bonding pad region of said first integrated circuit and so that said second integrated circuit is oriented substantially parallel to said first integrated circuit; and wire bonding a conductor between said bonding pad region of said second integrated circuit and said second set of bonding pads located on said circuit board.
Claim 18
Independent Claim
228 words
A method for fabricating a multichip module comprising the steps of: adhesively attaching a first integrated circuit having a bonding pad region located on an upper surface of said first integrated circuit and a bottom surface having a portion under said bonding pad region on said upper surface of said first integrated circuit partially cut away to a circuit board having first and second sets of bonding pads so that said first integrated circuit is oriented substantially parallel to said circuit board; wire bonding a conductor between said bonding pad region of said first integrated circuit and said first set of bonding pads located on said circuit board; thereafter, adhesively attaching a second integrated circuit having a bonding pad region located on an upper surface of said second integrated circuit and a bottom surface having a portion under said bonding pad region on said upper surface of said first integrated circuit partially cut away to said upper surface of said first integrated circuit so that said partially cut away portion of said second integrated circuit overhangs said bonding pad region of said first integrated circuit and so that said second integrated circuit is oriented substantially parallel to said first integrated circuit; and wire bonding a conductor between said bonding pad region of said second integrated circuit and said second set of bonding pads located on said circuit board.
Claim 19
Dependent Claim
24 words
The method of claim 15 wherein said portion partially cut away in each of said first and second integrated circuits comprises a beveled edge.
Claim 20
Dependent Claim
23 words
The method of claim 16 wherein said portion partially cut away in each of said first and second integrated circuits comprises a notch.
Claim 21
Independent Claim
249 words
A method for fabricating a multichip module comprising the steps of: providing a wafer having an upper surface comprising a plurality of integrated circuits, each of said plurality of integrated circuits including first and second bonding pad regions along opposing edges of said each integrated circuit; cutting beveled edges along a bottom surface of said wafer to correspond generally with said opposing edges of each of said plurality of integrated circuits; thereafter, dicing said wafer along said beveled edges to separate said plurality of integrated circuits; providing a circuit board having first and second sets of bond pads; adhesively attaching a first of said plurality of integrated circuits to said circuit board so that said first integrated circuit is oriented substantially parallel to said circuit board; wire bonding conductor wires between each of said first and second bonding pad regions of said first integrated circuit and said first set of bonding pads located on said circuit board; thereafter, adhesively attaching a second of said plurality of integrated circuits atop of said first integrated circuit in a manner in which beveled edge portions of said second integrated circuit overhang each of said first and second bonding pad regions of said first integrated circuit and so that said second integrated circuit is oriented substantially parallel to said first integrated circuit; and wire bonding conductor wires between each of said first and second bonding regions of said second integrated circuit and said second set of bonding pads located on said circuit board.
Claim 22
Independent Claim
249 words
A method for fabricating a multichip module comprising the steps of: providing a wafer having an upper surface comprising a plurality of integrated circuits, each of said plurality of integrated circuits including first and second bonding pad regions along opposing edges of said each integrated circuit; cutting beveled edges along a bottom surface of said wafer to correspond generally with said opposing edges of each of said plurality of integrated circuits; thereafter, dicing said wafer along said beveled edges to separate said plurality of integrated circuits; providing a circuit board having first and second sets of bond pads; adhesively attaching a first of said plurality of integrated circuits to said circuit board so that said first integrated circuit is oriented substantially parallel to said circuit board; wire bonding conductor wires between each of said first and second bonding pad regions of said first integrated circuit and said first set of bonding pads located on said circuit board; thereafter, adhesively attaching a second of said plurality of integrated circuits atop of said first integrated circuit in a manner in which beveled edge portions of said second integrated circuit overhang each of said first and second bonding pad regions of said first integrated circuit and so that said second integrated circuit is oriented substantially parallel to said first integrated circuit; and wire bonding conductor wires between each of said first and second bonding regions of said second integrated circuit and said second set of bonding pads located on said circuit board.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2001-09-07 | 2002-03-09 | 2002-09-08 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2005-09-07 | 2006-03-09 | 2006-09-08 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2009-09-07 | 2010-03-09 | 2010-09-08 | $7700.00 | Window Closed / Lapsed |