Non-volatile semiconductor memory having programming region for injecting and ejecting carriers into and from a floating gate

Claim 1

A semiconductor memory device comprising: a semiconductor substrate and a plurality of memory cells, each of said memory cells including a first region, a second region and a programming region selectively formed in said semiconductor substrate, a first gate insulating film covering a part of said first region, a second gate insulating film covering a part of said programming region, said first gate insulating film and said second gate insulating film, wherein carriers move between a floating gate and said programming region, being of substantially equal thickness, said floating gate having a first portion overlapping said part of said first region to form a first capacitance therebetween and a second portion overlapping said part of said programming region to form a second capacitance, an area of said first portion being larger than an area of said second portion, such that said first capacitance is larger than said second capacitance, and an additional gate provided on an insulating layer covering said floating gate, said additional gate being connected to said first region.