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US5801399A
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Semiconductor device with antireflection film
Assignee: Yamaha Corp
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Filing: 1997-08-05
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Granted: 1998-09-01
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Expires: 2017-08-05
Abstract
Abstract A stress relaxation layer is inserted between an electrode layer and an antireflection layer to relax a stress imparted from one of the electrode and antireflection layers to the other. A semiconductor device is provided which can suppress separation of the antireflection film during device fabrication processes and dispense with the process of etching and removing the antireflection film.
Inventors
- 👤 Atsuo Hattori
- 👤 Satoshi Hibino
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-03 14:21
CPC Classifications
H; H10; H10D; H10D64/00; H10D64/01; H10D64/013; H10D64/01302; H10D64/01304; H10D64/60; H10D64/66; H10D64/661; H10D64/662; H10D64/663; H10P; H10P50/00; H10P50/71
Claims Analysis
Total Claims: 6
Claim 1
Independent Claim
169 words
A semiconductor device comprising: a semiconductor substrate having an uneven surface; a first layer made of conductive material and formed on the semiconductor substrate in a predetermined pattern; a second layer formed directly on the first layer, and having the same predetermined pattern as the first layer; and a third layer formed directly on the second layer, and having the same predetermined pattern as the first and second layers, the third layer being an antireflection film made of material different from the first and second layers, the composition and arrangement of the antireflection film being such as to lower an intensity of light incident to and reflected from the first layer, wherein the second layer has a composition different from the first and third layers, the composition and arrangement of the second layer being such as to cause relaxing of any stress generated between the first and third layer, the first layer comprising WSi, the second layer comprising amorphous silicon or polycrystalline silicon, and the third layer comprising SiNx.
Claim 2
Dependent Claim
169 words
A semiconductor device comprising: a semiconductor substrate having an uneven surface; a first layer made of conductive material and formed on the semiconductor substrate in a predetermined pattern; a second layer formed directly on the first layer, and having the same predetermined pattern as the first layer; and a third layer formed directly on the second layer, and having the same predetermined pattern as the first and second layers, the third layer being an antireflection film made of material different from the first and second layers, the composition and arrangement of the antireflection film being such as to lower an intensity of light incident to and reflected from the first layer, wherein the second layer has a composition different from the first and third layers, the composition and arrangement of the second layer being such as to cause relaxing of any stress generated between the first and third layer, the first layer comprising WSi, the second layer comprising amorphous silicon or polycrystalline silicon, and the third layer comprising SiNx.
Claim 3
Dependent Claim
24 words
A semiconductor device according to claim 1, wherein the second layer comprises amorphous silicon and has a film thickness of 10 nm or more.
Claim 4
Dependent Claim
23 words
A semiconductor device according to claim 1, wherein the first layer is a wiring layer or a gate electrode of the semiconductor device.
Claim 5
Dependent Claim
172 words
A semiconductor device comprising: a semiconductor substrate having an uneven surface; a first layer made of conductive material and formed on the semiconductor substrate in a predetermined pattern; a second layer formed directly on the first layer, and having the same predetermined pattern as the first layer; and a third layer formed directly on the second layer, and having the same predetermined pattern as the first and second layers, the third layer being an antireflection film made of material different from the first and second layers, the composition and arrangement of the antireflection film being such as to lower an intensity of light incident to and reflected from the first layer, wherein the second layer has a composition different from the first and third layers, the composition and arrangement of the second layer being such as to cause relaxing of any stress generated between the first and third layers, the second layer comprising a material selected from the group consisting of amorphous silicon, polycrystalline silicon, amorphous carbon, SiON, PSG, BPSG and BSG.
Claim 6
Dependent Claim
172 words
A semiconductor device comprising: a semiconductor substrate having an uneven surface; a first layer made of conductive material and formed on the semiconductor substrate in a predetermined pattern; a second layer formed directly on the first layer, and having the same predetermined pattern as the first layer; and a third layer formed directly on the second layer, and having the same predetermined pattern as the first and second layers, the third layer being an antireflection film made of material different from the first and second layers, the composition and arrangement of the antireflection film being such as to lower an intensity of light incident to and reflected from the first layer, wherein the second layer has a composition different from the first and third layers, the composition and arrangement of the second layer being such as to cause relaxing of any stress generated between the first and third layers, the second layer comprising a material selected from the group consisting of amorphous silicon, polycrystalline silicon, amorphous carbon, SiON, PSG, BPSG and BSG.
References Cited (Backward Citations)
US4378628A
Cited
US4609930A
Cited
US4924294A
Cited
JPH05267671A
Cited
US5346860A
Cited
JPH06132245A
Cited
JPH06132286A
Cited
US5373169A
Cited
JPH06349695A
Cited
US5488246A
Cited
JPH0786244A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2001-08-31 | 2002-03-02 | 2002-09-01 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2005-08-31 | 2006-03-02 | 2006-09-01 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2009-08-31 | 2010-03-02 | 2010-09-01 | $7700.00 | Window Closed / Lapsed |