US5796570A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Electrostatic discharge protection package
Assignee: National Semiconductor Corp
•
Filing: 1996-09-19
•
Granted: 1998-08-18
•
Expires: 2016-09-19
Abstract
Abstract Described is a circuit board having protection against electrostatic discharge. The board includes a plurality of interconnect traces and an electrically conductive ground plane formed on a substrate such that a gap is created between the interconnect traces and the ground plane. A resistive electrostatic discharge protection material is positioned to bridge the gaps between the ground plane and the interconnect traces, such that the electrostatic discharge protection material electrically insulates the interconnect traces from the ground plane at voltages below a predefined threshold voltage and establishes an electrical connection between the interconnect traces and the conductive plane at voltages above the threshold voltage. A process of manufacturing the circuit board includes forming interconnect traces and a ground plane such that there is a gap between the ground plane and the interconnect traces. A resistive electrostatic discharge protection material is placed in the gap between the ground plane and the traces for protection against electrostatic discharge. A package including the above described circuit board and a process of manufacturing such a package are also disclosed herein.
Inventors
- 👤 Boonmi Mekdhanasarn
- 👤 Randy Hsiao-Yu Lo
- 👤 Steve M. Ichikawa
- 👤 Abdul Rahim Ahmed
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-09 13:32
CPC Classifications
H; H01; H01T; H01T4/00; H01T4/08; H10; H10W; H10W42/00; H10W42/60; H10W72/00; H10W72/50; H10W72/531; H10W72/536; H10W72/5363; H10W72/541; H10W72/5445; H10W72/5449; H10W72/547; H10W72/5473; H10W72/851; H10W72/874; H10W72/884; H10W72/90; H10W72/931; H10W72/932; H10W74/00
Claims Analysis
Total Claims: 39
Claim 1
Independent Claim
151 words
A circuit board, the circuit board having protection against electrostatic discharge (ESD), comprising: a substrate suitable for supporting a die; a plurality of interconnect traces formed on the substrate; an electrically conductive ground plane formed on said substrate such that the ground plane is substantially co-planer with the interconnect traces, the ground plane being arranged such that a gap is created between the interconnect traces and the ground plane; and a resistive electrostatic discharge (ESD) protection material positioned to bridge the gap between the ground plane and the interconnect traces in a substantially co-planer manner, without substantially covering the interconnect traces or the electrically conductive ground plane, wherein said ESD protection material is arranged to electrically insulate the interconnect traces from the ground plane at voltages below a predefined threshold voltage and to establish an electrical connection between said interconnect traces and said conductive plane at voltages above the threshold voltage.
Claim 2
Dependent Claim
151 words
A circuit board, the circuit board having protection against electrostatic discharge (ESD), comprising: a substrate suitable for supporting a die; a plurality of interconnect traces formed on the substrate; an electrically conductive ground plane formed on said substrate such that the ground plane is substantially co-planer with the interconnect traces, the ground plane being arranged such that a gap is created between the interconnect traces and the ground plane; and a resistive electrostatic discharge (ESD) protection material positioned to bridge the gap between the ground plane and the interconnect traces in a substantially co-planer manner, without substantially covering the interconnect traces or the electrically conductive ground plane, wherein said ESD protection material is arranged to electrically insulate the interconnect traces from the ground plane at voltages below a predefined threshold voltage and to establish an electrical connection between said interconnect traces and said conductive plane at voltages above the threshold voltage.
Claim 3
Dependent Claim
31 words
The circuit board of claim 1, further comprising a die attach area suitable for connecting to ground voltage, wherein ESD protection material is between the traces and the die attach area.
Claim 4
Dependent Claim
34 words
The circuit board of claim 1, further comprising a die attach area on the substrate, wherein said conductive plane takes the form of a substantially ring shaped metal trace around the die attach area.
Claim 5
Dependent Claim
20 words
The circuit board of claim 1, wherein said ESD protection material takes the form of a strip of polymer tape.
Claim 6
Dependent Claim
19 words
The circuit board of claim 1, wherein the predefined threshold voltage ranges between about 10 and about 500 volts.
Claim 7
Dependent Claim
19 words
The circuit board of claim 5, wherein said predefined threshold voltage ranges between about 10 and about 100 volts.
Claim 8
Dependent Claim
18 words
The circuit board of claim 6, said predefined threshold voltage ranges between about 10 and about 50 volts.
Claim 9
Dependent Claim
20 words
The circuit board of claim 1, wherein the width of said gap ranges between about 0.25 and about 5 mils.
Claim 10
Dependent Claim
20 words
The circuit board of claim 8, wherein the width of said gap ranges between about 0.5 and about 1.5 mils.
Claim 11
Dependent Claim
20 words
The circuit board of claim 1, wherein the depth of said gap ranges between about 0.5 and about 5 mils.
Claim 12
Dependent Claim
20 words
The circuit board of claim 10, wherein the width of said gap does not exceed the depth of said gap.
Claim 13
Dependent Claim
227 words
A packaged semiconductor device, comprising: a circuit board including: a plurality of interconnect traces formed on the substrate; an electrically conductive ground plane formed at least partially adjacent the die attach area such that the ground plane is substantially co-planer with the interconnect traces, the ground plane being arranged such that a gap is created between the interconnect traces and the ground plane; and a resistive electrostatic discharge (ESD) protection material positioned to bridge the gap between the ground plane and the interconnect traces, wherein said ESD protection material is arranged to electrically insulate the interconnect traces from the ground plane at voltages below a predefined threshold voltage and to establish an electrical connection between said interconnect traces and said conductive plane at voltages above the threshold voltage; a die having a plurality of bond pads and attached to a die attach area on the circuit board; a plurality of bonding wires electrically connecting associated ones of the bond pads to associated ones of the traces; a plurality of leads disposed outside the circuit board and suitable for connection to external circuitry; a plurality of wires electrically connecting associated ones of said interconnect metal traces to associated ones of said leads; and an encapsulation material encapsulating a portion of the packaged semiconductor and leaving exposed a portion of the leads to facilitate electrical connection to external circuitry.
Claim 14
Dependent Claim
227 words
A packaged semiconductor device, comprising: a circuit board including: a plurality of interconnect traces formed on the substrate; an electrically conductive ground plane formed at least partially adjacent the die attach area such that the ground plane is substantially co-planer with the interconnect traces, the ground plane being arranged such that a gap is created between the interconnect traces and the ground plane; and a resistive electrostatic discharge (ESD) protection material positioned to bridge the gap between the ground plane and the interconnect traces, wherein said ESD protection material is arranged to electrically insulate the interconnect traces from the ground plane at voltages below a predefined threshold voltage and to establish an electrical connection between said interconnect traces and said conductive plane at voltages above the threshold voltage; a die having a plurality of bond pads and attached to a die attach area on the circuit board; a plurality of bonding wires electrically connecting associated ones of the bond pads to associated ones of the traces; a plurality of leads disposed outside the circuit board and suitable for connection to external circuitry; a plurality of wires electrically connecting associated ones of said interconnect metal traces to associated ones of said leads; and an encapsulation material encapsulating a portion of the packaged semiconductor and leaving exposed a portion of the leads to facilitate electrical connection to external circuitry.
Claim 15
Dependent Claim
35 words
A packaged semiconductor device as recited in claim 12 that takes the form of a multi-chip module, the multi-chip module including a plurality of dies attached to the circuit board in the die attach area.
Claim 16
Dependent Claim
112 words
A process for making a circuit board having ESD protection, the method comprising the steps of: forming a plurality of interconnect traces on a substrate board; forming a ground plane around a die attach area on the substrate board such that a gap is formed between the ground plane and the interconnect traces; and placing a resistive ESD protection material in the gap between the ground plane and the traces, wherein said ESD protection material is arranged to electrically insulate the traces from the ground plane at voltages below a predefined threshold voltage and to establish an electrical connection between said traces and said conductive plane at voltages above the threshold voltage.
Claim 17
Dependent Claim
112 words
A process for making a circuit board having ESD protection, the method comprising the steps of: forming a plurality of interconnect traces on a substrate board; forming a ground plane around a die attach area on the substrate board such that a gap is formed between the ground plane and the interconnect traces; and placing a resistive ESD protection material in the gap between the ground plane and the traces, wherein said ESD protection material is arranged to electrically insulate the traces from the ground plane at voltages below a predefined threshold voltage and to establish an electrical connection between said traces and said conductive plane at voltages above the threshold voltage.
Claim 18
Dependent Claim
120 words
A process as recited in claim 14, further comprising the steps of: mounting a die on the die attach area, the die including a plurality of bond pads; electrically connecting the die to appropriate traces on the substrate board using a first set of bonding wires, each bonding wire having a first end coupled to an associated bond pad and a second end coupled to an associated interconnect trace; electrically connecting selected ones of the interconnect traces to associated leads of a lead frame; and encapsulating the die, the bonding wires, and a portion of the leads to provide a protective package and leaving exposed a portion of the leads to facilitate electrical connection of the die to external circuitry.
Claim 19
Dependent Claim
21 words
The process of claim 14, wherein said step of forming the interconnect traces comprises printing the interconnect traces on the substrate.
Claim 20
Dependent Claim
27 words
The process of claim 16, wherein said step of forming the interconnect traces further comprises cutting into a portion of the interconnect traces to define said gap.
Claim 21
Dependent Claim
37 words
The process of claim 14, wherein said steps of forming the interconnect traces and forming the ground plane include etching a conductive layer of the substrate board to form the interconnect metal traces, ground plane and gap.
Claim 22
Dependent Claim
57 words
The process of claim 14, wherein said step of forming a ground plane comprises one step selected from the group consisting of forming at least one substantially ring shaped ground trace, electrically connecting the die attach area to ground voltage, or electrically connecting one of the leads in electrical connection with the ground plane to ground voltage.
Claim 23
Dependent Claim
53 words
The process of claim 14, wherein said step of placing the ESD protection material comprises one step selected from the group consisting of transfer printing the ESD protection material on the gap, screen printing the ESD protection material on the gap or dispensing the ESD protection material through a nozzle on the gap.
Claim 24
Dependent Claim
35 words
The process of claim 14, wherein said step of placing the ESD protection material further comprises: depositing a polymer solution of the ESD protection material in the gap; curing the polymer solution in the gap.
Claim 25
Dependent Claim
32 words
The process of claim 21, wherein said step of curing said ESD protection material comprises heat treating said ESD protection material at a temperature ranges between about 100° and about 500° C.
Claim 26
Dependent Claim
16 words
The process of claim 22, wherein said temperature ranges between about 100° and about 200° C.
Claim 27
Dependent Claim
16 words
The process of claim 23, wherein said temperature ranges between about 100° and about 150° C.
Claim 28
Dependent Claim
132 words
A circuit board having protection against electrostatic discharge (ESD), comprising: a substrate having a die support area suitable for supporting a die; a plurality of interconnect traces formed on the substrate; an electrically conductive ground plane formed on said substrate at least partially adjacent the die support area, the ground plane being arranged such that a gap is created between the interconnect traces and the ground plane; and a resistive electrostatic discharge (ESD) protection material positioned to bridge the gap between the ground plane and the interconnect traces, wherein said ESD protection material is arranged to electrically insulate the interconnect traces from the ground plane at voltages below a predefined threshold voltage and to establish an electrical connection between said interconnect traces and said conductive plane at voltages above the threshold voltage.
Claim 29
Dependent Claim
132 words
A circuit board having protection against electrostatic discharge (ESD), comprising: a substrate having a die support area suitable for supporting a die; a plurality of interconnect traces formed on the substrate; an electrically conductive ground plane formed on said substrate at least partially adjacent the die support area, the ground plane being arranged such that a gap is created between the interconnect traces and the ground plane; and a resistive electrostatic discharge (ESD) protection material positioned to bridge the gap between the ground plane and the interconnect traces, wherein said ESD protection material is arranged to electrically insulate the interconnect traces from the ground plane at voltages below a predefined threshold voltage and to establish an electrical connection between said interconnect traces and said conductive plane at voltages above the threshold voltage.
Claim 30
Dependent Claim
31 words
The circuit board of claim 25, wherein the electrically conductive ground plane covers the die support area on the substrate thereby forming an electrically grounded die attach area for the die.
Claim 31
Dependent Claim
20 words
The circuit board of claim 25, wherein the electrically conductive ground plane forms a ring about the die support area.
Claim 32
Dependent Claim
20 words
The circuit board of claim 25, wherein said ESD protection material takes the form of a strip of polymer tape.
Claim 33
Dependent Claim
19 words
The circuit board of claim 25, wherein the predefined threshold voltage ranges between about 10 and about 500 volts.
Claim 34
Dependent Claim
19 words
The circuit board of claim 25, wherein said predefined threshold voltage ranges between about 10 and about 100 volts.
Claim 35
Dependent Claim
19 words
The circuit board of claim 27, wherein said predefined threshold voltage ranges between about 10 and about 50 volts.
Claim 36
Dependent Claim
20 words
The circuit board of claim 25, wherein the width of said gap ranges between about 0.25 and about 5 mils.
Claim 37
Dependent Claim
20 words
The circuit board of claim 25, wherein the width of said gap ranges between about 0.5 and about 1.5 mils.
Claim 38
Dependent Claim
20 words
The circuit board of claim 30, wherein the depth of said gap ranges between about 0.5 and about 5 mils.
Claim 39
Dependent Claim
20 words
The circuit board of claim 30, wherein the width of said gap does not exceed the depth of said gap.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2001-08-17 | 2002-02-16 | 2002-08-18 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2005-08-17 | 2006-02-16 | 2006-08-18 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2009-08-17 | 2010-02-16 | 2010-08-18 | $7700.00 | Window Closed / Lapsed |