US5729705A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Method and apparatus for enhancing throughput of disk array data transfers in a controller
Assignee: Avago Technologies International Sales Pte Ltd
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Filing: 1995-07-24
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Granted: 1998-03-17
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Expires: 2015-07-24
Abstract
Abstract A method for transferring data in a controller having a processor and a controller support device, with the controller connected to a host device and a disk drive. The method includes the steps of providing the controller with a first bus and a second bus, connecting a first bus between the disk drive and the host device, connecting a second bus between the processor and the controller support device, transferring first data between the disk drive and the host device across the first bus, and transferring second data between the processor and the controller support device across the second bus without consuming any portion of the bandwidth of the first bus. A controller architecture is also disclosed.
Inventors
- 👤 Bret S. Weber
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-04 11:54
CPC Classifications
G; G06; G06F; G06F3/00; G06F3/06; G06F3/0601; G06F13/00; G06F13/38; G06F13/40; G06F13/4004; G06F13/4027; G06F3/0668; G06F3/0671; G06F3/0673
Claims Analysis
Total Claims: 20
Claim 1
Independent Claim
89 words
A method for transferring data in a controller connected between a host device and a disk drive, comprising the steps of: transferring from the host device to the controller a first scatter/gather list that indicates where a block of data is located in a host memory; generating a second scatter/gather list indicating where to store the block of data in a controller memory; and transferring the block of data from the host memory to the controller memory in accordance with the first scatter/gather list and the second scatter/gather list.
Claim 2
Independent Claim
89 words
A method for transferring data in a controller connected between a host device and a disk drive, comprising the steps of: transferring from the host device to the controller a first scatter/gather list that indicates where a block of data is located in a host memory; generating a second scatter/gather list indicating where to store the block of data in a controller memory; and transferring the block of data from the host memory to the controller memory in accordance with the first scatter/gather list and the second scatter/gather list.
Claim 3
Dependent Claim
23 words
The method of claim 1, further including the step of: transferring the block of data from the controller memory to a disk drive.
Claim 4
Dependent Claim
71 words
The method of claim 1, wherein the step of transferring the block of data from the host memory to the controller memory includes the steps of: transferring the block of data from the host memory to an interface circuit at a first operating speed; and transferring the block of data from the interface circuit to the controller memory at a second operating speed that is different than the first operating speed.
Claim 5
Dependent Claim
18 words
The method of claim 1, further including the step of: generating parity information from the block of data.
Claim 6
Dependent Claim
18 words
The method of claim 4, further including the step of: storing the parity information in the controller memory.
Claim 7
Dependent Claim
21 words
The method of claim 4, further including the step of: transferring the parity information from the controller to the disk drive.
Claim 8
Independent Claim
94 words
A method for transferring data in a controller connected to a host device and a disk drive, comprising the steps of: transferring a block of data from a disk drive to a controller memory; generating a first scatter/gather list indicating where the block of data is stored in the controller memory; generating a second scatter/gather list indicating where to store the block of data in a host memory; and transferring the block of data from the controller memory to the host memory in accordance with the first scatter/gather list and the second scatter/gather list.
Claim 9
Independent Claim
94 words
A method for transferring data in a controller connected to a host device and a disk drive, comprising the steps of: transferring a block of data from a disk drive to a controller memory; generating a first scatter/gather list indicating where the block of data is stored in the controller memory; generating a second scatter/gather list indicating where to store the block of data in a host memory; and transferring the block of data from the controller memory to the host memory in accordance with the first scatter/gather list and the second scatter/gather list.
Claim 10
Dependent Claim
71 words
The method of claim 7, wherein the step of transferring the block of data from the controller memory to the host memory includes the steps of: transferring the block of data from the controller memory to an interface circuit at a first operating speed; and transferring the block of data from the interface circuit to the host memory at a second operating speed that is different than the first operating speed.
Claim 11
Dependent Claim
20 words
The method of claim 7, further including the step of: transferring parity information from the disk drive to the controller.
Claim 12
Dependent Claim
21 words
The method of claim 9, further including the step of: generating missing data from the parity information and the block data.
Claim 13
Dependent Claim
31 words
The method of claim 10, further including the step of: transferring the generated missing data to the host device in accordance with the first scatter/gather list and the second scatter/gather list.
Claim 14
Dependent Claim
99 words
A controller connected to a host device and a disk drive, the controller comprising: a controller memory; an interface circuit coupled to said controller memory, said interface circuit being configured to receive from the host device a first scatter/gather list indicating where a block of data is located in a host memory of the host device and to generate a second scatter/gather list indicating where to store said block in said controller memory; an input/output processor coupled to said controller memory, said input/output processor configured to transfer said block of data from said controller memory to a disk drive.
Claim 15
Dependent Claim
99 words
A controller connected to a host device and a disk drive, the controller comprising: a controller memory; an interface circuit coupled to said controller memory, said interface circuit being configured to receive from the host device a first scatter/gather list indicating where a block of data is located in a host memory of the host device and to generate a second scatter/gather list indicating where to store said block in said controller memory; an input/output processor coupled to said controller memory, said input/output processor configured to transfer said block of data from said controller memory to a disk drive.
Claim 16
Dependent Claim
47 words
The controller of claim 12, wherein: said interface circuit is further configured to receive said first scatter/gather list at a first operating speed and to transmit said block of data to said controller memory at a second operating speed that is different than said first operating speed.
Claim 17
Dependent Claim
35 words
The controller of claim 12, further comprising: a parity circuit coupled to said controller memory, said parity circuit configured to receive said block of data and to generate parity information from said block of data.
Claim 18
Dependent Claim
35 words
The controller of claim 12, wherein: said input/output processor is further configured to receive a second block of data from the disk drive and to transfer said second block of data to said controller memory.
Claim 19
Dependent Claim
30 words
The controller of claim 15, wherein: said input/output processor is further configured to receive parity information from the disk drive and to transfer said parity information to said controller memory.
Claim 20
Dependent Claim
33 words
The controller of claim 16, further comprising: a parity circuit coupled to said controller memory, said parity circuit configured to generate missing data from said second block of data and said parity information.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2001-03-16 | 2001-09-15 | 2002-03-17 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2005-03-16 | 2005-09-15 | 2006-03-17 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2009-03-16 | 2009-09-15 | 2010-03-17 | $7700.00 | Window Closed / Lapsed |