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US5716864A
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Method of manufacturing a non-volatile semiconductor memory device with peripheral transistor
Assignee: Fujitsu Ltd
•
Filing: 1996-01-22
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Granted: 1998-02-10
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Expires: 2016-01-22
Abstract
Abstract A first insulating film for the formation of a gate insulating film is formed on a semiconductor substrate having a memory cell forming region and a peripheral transistor forming region. A first conductive film for the formation of a floating gate is formed on the first insulating film, and a second insulating film is formed on the first conductive film. A second conductive film is formed on the second insulating film for protecting the second insulating film, and a protective film performing the functions of an oxidation-resistant film, a washing-resistant film and an etching resistant film is formed on the second conductive film. Then, the peripheral transistor region is subjected to a predetermined process. A third conductive film, which will become a control gate of the memory cell and a gate of the peripheral transistor, is formed on the second conductive film and the peripheral transistor forming region subjected to the predetermined process.
Inventors
- 👤 Hirofumi Abe
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-31 22:40
CPC Classifications
H; H10; H10B; H10B41/00; H10B41/40; H10B41/42; H10B41/43
Claims Analysis
Total Claims: 64
Claim 1
Independent Claim
160 words
A method of manufacturing a non-volatile semiconductor memory device in which a non-volatile memory cell and a peripheral transistor are formed on a semiconductor substrate, the method comprising the steps of: forming a first insulating film for the formation of a gate insulating film on at least a memory cell forming region of the semiconductor substrate having the memory cell forming region and a peripheral transistor forming region; forming a first conductive film for the formation of a floating gate on said first insulating film; forming a second insulating film on said first conductive film; forming a second conductive film on the second insulating film for protecting the second insulating film; subjecting said peripheral transistor forming region to a first process; and forming a third conductive film, which will become a control gate of the memory cell and a gate of the peripheral transistor, on the second conductive film and the peripheral transistor forming region subjected to said first process.
Claim 2
Independent Claim
160 words
A method of manufacturing a non-volatile semiconductor memory device in which a non-volatile memory cell and a peripheral transistor are formed on a semiconductor substrate, the method comprising the steps of: forming a first insulating film for the formation of a gate insulating film on at least a memory cell forming region of the semiconductor substrate having the memory cell forming region and a peripheral transistor forming region; forming a first conductive film for the formation of a floating gate on said first insulating film; forming a second insulating film on said first conductive film; forming a second conductive film on the second insulating film for protecting the second insulating film; subjecting said peripheral transistor forming region to a first process; and forming a third conductive film, which will become a control gate of the memory cell and a gate of the peripheral transistor, on the second conductive film and the peripheral transistor forming region subjected to said first process.
Claim 3
Dependent Claim
31 words
The method of manufacturing a non-volatile semiconductor memory device according to claim 1, wherein said second conductive film and said third conductive film are integrated to function as a control gate.
Claim 4
Dependent Claim
25 words
The method of manufacturing a non-volatile semiconductor memory device according to claim 1, wherein said first, second and third conductive films are formed of polysilicon.
Claim 5
Dependent Claim
37 words
The method of manufacturing a non-volatile semiconductor memory device according to claim 1, wherein said second insulating film has a three-layer structure in which an Si 3 N 4 film is sandwiched by two SiO 2 films.
Claim 6
Independent Claim
210 words
A method of manufacturing a non-volatile semiconductor memory device in which a non-volatile memory cell and a peripheral transistor are formed on a semiconductor substrate, the method comprising the steps of: forming a first insulating film for the formation of a gate insulating film on at least a memory cell forming region of the semiconductor substrate having the memory cell forming region and a peripheral transistor forming region; forming a first insulating film for the formation of a gate insulating film on at least a memory cell forming region of the semiconductor substrate having the memory cell forming region and a peripheral transistor forming region; forming a first conductive film for the formation of a floating gate on said first insulating film; forming a second insulating film on said first conductive film; forming a second conductive film on the second insulating film for protecting the second insulating film; forming an oxidation-resistant film on said second conductive film; subjecting said peripheral transistor forming region to a first process; removing said oxidation-resistant film; and forming a third conductive film, which will become a control gate of the memory cell and a gate of the peripheral transistor, on the second conductive film and the peripheral transistor forming region subjected to said first process.
Claim 7
Independent Claim
210 words
A method of manufacturing a non-volatile semiconductor memory device in which a non-volatile memory cell and a peripheral transistor are formed on a semiconductor substrate, the method comprising the steps of: forming a first insulating film for the formation of a gate insulating film on at least a memory cell forming region of the semiconductor substrate having the memory cell forming region and a peripheral transistor forming region; forming a first insulating film for the formation of a gate insulating film on at least a memory cell forming region of the semiconductor substrate having the memory cell forming region and a peripheral transistor forming region; forming a first conductive film for the formation of a floating gate on said first insulating film; forming a second insulating film on said first conductive film; forming a second conductive film on the second insulating film for protecting the second insulating film; forming an oxidation-resistant film on said second conductive film; subjecting said peripheral transistor forming region to a first process; removing said oxidation-resistant film; and forming a third conductive film, which will become a control gate of the memory cell and a gate of the peripheral transistor, on the second conductive film and the peripheral transistor forming region subjected to said first process.
Claim 8
Dependent Claim
31 words
The method of manufacturing a non-volatile semiconductor memory device according to claim 5, wherein said second conductive film and said third conductive film are integrated to function as a control gate.
Claim 9
Dependent Claim
25 words
The method of manufacturing a non-volatile semiconductor memory device according to claim 5, wherein said first, second and third conductive films are formed of polysilicon.
Claim 10
Dependent Claim
37 words
The method of manufacturing a non-volatile semiconductor memory device according to claim 5, wherein said second insulating film has a three-layer structure in which an Si 3 N 4 film is sandwiched by two SiO 2 films.
Claim 11
Dependent Claim
25 words
The method of manufacturing a non-volatile semiconductor memory device according to claim 5, wherein said oxidation-resistant film is formed of Si 3 N 4 .
Claim 12
Independent Claim
225 words
A method of manufacturing a non-volatile semiconductor memory device, said method comprising the steps of: separating a semiconductor substrate into a memory cell forming region and a peripheral transistor forming region; forming a mask on the peripheral transistor forming region and implanting a dopant in the memory cell forming region; forming a first insulating film on the entire surface of the substrate; forming a first conductive film for the formation of a floating gate on the first insulating film in the memory cell forming region; forming a second insulating film on the entire surface of the resultant structure; forming a second conductive film on the second insulating film for protecting the second insulating film; forming an oxidation-resistant film on said second conductive film; removing the oxidation-resistant film, the second conductive film and the first and second insulating films in the peripheral transistor forming region; forming a mask on the memory cell forming region and injecting a dopant in the peripheral transistor forming region; forming a gate insulating film for the peripheral transistor on the peripheral transistor forming region by thermal oxidation; removing the oxidation-resistant film in the memory cell forming region; and forming a third conductive film, which will become a control gate of the memory cell and a gate of the peripheral transistor, on the second conductive film and the peripheral transistor forming region.
Claim 13
Independent Claim
225 words
A method of manufacturing a non-volatile semiconductor memory device, said method comprising the steps of: separating a semiconductor substrate into a memory cell forming region and a peripheral transistor forming region; forming a mask on the peripheral transistor forming region and implanting a dopant in the memory cell forming region; forming a first insulating film on the entire surface of the substrate; forming a first conductive film for the formation of a floating gate on the first insulating film in the memory cell forming region; forming a second insulating film on the entire surface of the resultant structure; forming a second conductive film on the second insulating film for protecting the second insulating film; forming an oxidation-resistant film on said second conductive film; removing the oxidation-resistant film, the second conductive film and the first and second insulating films in the peripheral transistor forming region; forming a mask on the memory cell forming region and injecting a dopant in the peripheral transistor forming region; forming a gate insulating film for the peripheral transistor on the peripheral transistor forming region by thermal oxidation; removing the oxidation-resistant film in the memory cell forming region; and forming a third conductive film, which will become a control gate of the memory cell and a gate of the peripheral transistor, on the second conductive film and the peripheral transistor forming region.
Claim 14
Dependent Claim
31 words
The method of manufacturing a non-volatile semiconductor memory device according to claim 10, wherein said second conductive film and said third conductive film are integrated to function as a control gate.
Claim 15
Dependent Claim
25 words
The method of manufacturing a non-volatile semiconductor memory device according to claim 10, wherein said first, second and third conductive films are formed of polysilicon.
Claim 16
Dependent Claim
37 words
The method of manufacturing a non-volatile semiconductor memory device according to claim 10, wherein said second insulating film has a three-layer structure in which an Si 3 N 4 film is sandwiched by two SiO 2 films.
Claim 17
Dependent Claim
25 words
The method of manufacturing a non-volatile semiconductor memory device according to claim 10, wherein said oxidation-resistant film is formed of Si 3 N 4 .
Claim 18
Independent Claim
215 words
A method of manufacturing a non-volatile semiconductor memory device, said method comprising the steps of: separating a semiconductor substrate into a memory cell forming region and a peripheral transistor forming region; forming a mask on the peripheral transistor forming region and implanting a dopant in the memory cell forming region; forming a first insulating film on the entire surface of the substrate; forming a first conductive film for a floating gate on the first insulating film; forming a second insulating film on the first conductive film; forming a second conductive film on the second insulating film for protecting the second insulating film; forming an oxidation-resistant film on said second conductive film; removing the oxidation-resistant film, the first and second conductive films and the first and second insulating films in the peripheral transistor forming region; forming a mask on the memory cell forming region and injecting a dopant in the peripheral transistor forming region; forming a gate insulating film for the peripheral transistor on the peripheral transistor forming region by thermal oxidation; removing the oxidation-resistant film in the memory cell forming region; and forming a third conductive film, which will become a control gate of the memory cell and a gate of the peripheral transistor, on the second conductive film and the peripheral transistor forming region.
Claim 19
Independent Claim
215 words
A method of manufacturing a non-volatile semiconductor memory device, said method comprising the steps of: separating a semiconductor substrate into a memory cell forming region and a peripheral transistor forming region; forming a mask on the peripheral transistor forming region and implanting a dopant in the memory cell forming region; forming a first insulating film on the entire surface of the substrate; forming a first conductive film for a floating gate on the first insulating film; forming a second insulating film on the first conductive film; forming a second conductive film on the second insulating film for protecting the second insulating film; forming an oxidation-resistant film on said second conductive film; removing the oxidation-resistant film, the first and second conductive films and the first and second insulating films in the peripheral transistor forming region; forming a mask on the memory cell forming region and injecting a dopant in the peripheral transistor forming region; forming a gate insulating film for the peripheral transistor on the peripheral transistor forming region by thermal oxidation; removing the oxidation-resistant film in the memory cell forming region; and forming a third conductive film, which will become a control gate of the memory cell and a gate of the peripheral transistor, on the second conductive film and the peripheral transistor forming region.
Claim 20
Dependent Claim
31 words
The method of manufacturing a non-volatile semiconductor memory device according to claim 15, wherein said second conductive film and said third conductive film are integrated to function as a control gate.
Claim 21
Dependent Claim
25 words
The method of manufacturing a non-volatile semiconductor memory device according to claim 15, wherein said first, second and third conductive films are formed of polysilicon.
Claim 22
Dependent Claim
37 words
The method of manufacturing a non-volatile semiconductor memory device according to claim 15, wherein said second insulating film has a three-layer structure in which an Si 3 N 4 film is sandwiched by two SiO 2 films.
Claim 23
Dependent Claim
25 words
The method of manufacturing a non-volatile semiconductor memory device according to claim 15, wherein said oxidation-resistant film is formed of Si 3 N 4 .
Claim 24
Independent Claim
184 words
A method of manufacturing a non-volatile semiconductor memory device in which a non-volatile memory cell and a peripheral transistor are formed on a semiconductor substrate, the method comprising the steps of: forming a first insulating film for the formation of a gate insulating film on at least a memory cell forming region of the semiconductor substrate having the memory cell forming region and a peripheral transistor forming region; forming a first conductive film for the formation of a floating gate on the first insulating film; forming a second insulating film on the first conductive film; forming a second conductive film on the second insulating film for protecting the second insulating film; subjecting the peripheral transistor forming region to a first process; removing an insulating film formed on the second conductive film in the step of subjecting the peripheral transistor forming region to a first process; and forming a third conductive film, which will become a control gate of the memory cell and a gate of the peripheral transistor, on the second conductive film and the peripheral transistor forming region subjected to the first process.
Claim 25
Independent Claim
184 words
A method of manufacturing a non-volatile semiconductor memory device in which a non-volatile memory cell and a peripheral transistor are formed on a semiconductor substrate, the method comprising the steps of: forming a first insulating film for the formation of a gate insulating film on at least a memory cell forming region of the semiconductor substrate having the memory cell forming region and a peripheral transistor forming region; forming a first conductive film for the formation of a floating gate on the first insulating film; forming a second insulating film on the first conductive film; forming a second conductive film on the second insulating film for protecting the second insulating film; subjecting the peripheral transistor forming region to a first process; removing an insulating film formed on the second conductive film in the step of subjecting the peripheral transistor forming region to a first process; and forming a third conductive film, which will become a control gate of the memory cell and a gate of the peripheral transistor, on the second conductive film and the peripheral transistor forming region subjected to the first process.
Claim 26
Dependent Claim
31 words
The method of manufacturing a non-volatile semiconductor memory device according to claim 20, wherein said second conductive film and said third conductive film are integrated to function as a control gate.
Claim 27
Dependent Claim
27 words
The method of manufacturing a non-volatile semiconductor memory device according to claim 20, wherein each of said first, second and third conductive films is formed of polysilicon.
Claim 28
Dependent Claim
45 words
The method of manufacturing a non-volatile semiconductor memory device according to claim 20, wherein said second insulating film is of a three-layer structure including a central Si 3 N 4 film and two SiO 2 films having said Si 3 N 4 film interposed therebetween.
Claim 29
Independent Claim
173 words
A method of manufacturing a non-volatile semiconductor memory device in which a non-volatile memory cell and a peripheral transistor are formed on a semiconductor substrate, the method comprising the steps of: forming a first insulating film for the formation of a gate insulating film on at least a memory cell forming region of the semiconductor substrate having the memory cell forming region and a peripheral transistor forming region; forming a first conductive film for the formation of a floating gate on the first insulating film; forming a second insulating film on the first conductive film; forming a second conductive film on the second insulating film for protecting the second insulating film; forming a washing-resistant film on the second conductive film; subjecting the peripheral transistor forming region to a first process; removing the washing-resistant film; and forming a third conductive film, which will become a control gate of the memory cell and a gate of the peripheral transistor, on the second conductive film and the peripheral transistor forming region subjected to the first process.
Claim 30
Independent Claim
173 words
A method of manufacturing a non-volatile semiconductor memory device in which a non-volatile memory cell and a peripheral transistor are formed on a semiconductor substrate, the method comprising the steps of: forming a first insulating film for the formation of a gate insulating film on at least a memory cell forming region of the semiconductor substrate having the memory cell forming region and a peripheral transistor forming region; forming a first conductive film for the formation of a floating gate on the first insulating film; forming a second insulating film on the first conductive film; forming a second conductive film on the second insulating film for protecting the second insulating film; forming a washing-resistant film on the second conductive film; subjecting the peripheral transistor forming region to a first process; removing the washing-resistant film; and forming a third conductive film, which will become a control gate of the memory cell and a gate of the peripheral transistor, on the second conductive film and the peripheral transistor forming region subjected to the first process.
Claim 31
Dependent Claim
31 words
The method of manufacturing a non-volatile semiconductor memory device according to claim 24, wherein said second conductive film and said third conductive film are integrated to function as a control gate.
Claim 32
Dependent Claim
27 words
The method of manufacturing a non-volatile semiconductor memory device according to claim 24, wherein each of said first, second and third conductive films is formed of polysilicon.
Claim 33
Dependent Claim
45 words
The method of manufacturing a non-volatile semiconductor memory device according to claim 24, wherein said second insulating film is of a three-layer structure including a central Si 3 N 4 film and two SiO 2 films having said Si 3 N 4 film interposed therebetween.
Claim 34
Dependent Claim
25 words
The method of manufacturing a non-volatile semiconductor memory device according to claim 24, wherein said washing-resistant film is made of Si 3 N 4 .
Claim 35
Independent Claim
223 words
A method of manufacturing a non-volatile semiconductor memory device, comprising the steps of: separating a semiconductor substrate into a memory cell forming region and a peripheral transistor forming region; injecting a dopant into said memory cell forming region, with a mask applied to said peripheral transistor forming region; forming a first insulating film on the entire surface of said substrate; forming a first conductive film for the formation of a floating gate on that region of said first insulating film which is positioned on the memory cell forming region; forming a second insulating film on the entire surface; forming a second conductive film for protection on said second insulating film; forming a washing-resistant film on said second conductive film; removing those regions of said washing-resistant film, second conductive film, first and second insulating films which are formed in said peripheral transistor region; injecting a dopant into said peripheral transistor forming region, with a mask applied to said memory cell forming region; forming a gate insulating film for said peripheral transistor by thermal oxidation in the peripheral transistor forming region; removing said washing-resistant film from the memory cell forming region; and forming a third conductive film, which will become a control gate of the memory cell and a gate of the peripheral transistor, on the second conductive film and the peripheral transistor forming region.
Claim 36
Independent Claim
223 words
A method of manufacturing a non-volatile semiconductor memory device, comprising the steps of: separating a semiconductor substrate into a memory cell forming region and a peripheral transistor forming region; injecting a dopant into said memory cell forming region, with a mask applied to said peripheral transistor forming region; forming a first insulating film on the entire surface of said substrate; forming a first conductive film for the formation of a floating gate on that region of said first insulating film which is positioned on the memory cell forming region; forming a second insulating film on the entire surface; forming a second conductive film for protection on said second insulating film; forming a washing-resistant film on said second conductive film; removing those regions of said washing-resistant film, second conductive film, first and second insulating films which are formed in said peripheral transistor region; injecting a dopant into said peripheral transistor forming region, with a mask applied to said memory cell forming region; forming a gate insulating film for said peripheral transistor by thermal oxidation in the peripheral transistor forming region; removing said washing-resistant film from the memory cell forming region; and forming a third conductive film, which will become a control gate of the memory cell and a gate of the peripheral transistor, on the second conductive film and the peripheral transistor forming region.
Claim 37
Dependent Claim
31 words
The method of manufacturing a non-volatile semiconductor memory device according to claim 29, wherein said second conductive film and said third conductive film are integrated to function as a control gate.
Claim 38
Dependent Claim
27 words
The method of manufacturing a non-volatile semiconductor memory device according to claim 29, wherein each of said first, second and third conductive films is formed of polysillcon.
Claim 39
Dependent Claim
45 words
The method of manufacturing a non-volatile semiconductor memory device according to claim 29, wherein said second insulating film is of a three-layer structure including a central Si 3 N 4 film and two SiO 2 films having said Si 3 N 4 film interposed therebetween.
Claim 40
Dependent Claim
25 words
The method of manufacturing a non-volatile semiconductor memory device according to claim 29, wherein said washing-resistant film is made of Si 3 N 4 .
Claim 41
Independent Claim
215 words
A method of manufacturing a non-volatile semiconductor memory device, comprising the steps of: separating a semiconductor substrate into a memory cell forming region and a peripheral transistor forming region; injecting a dopant into said memory cell forming region, with a mask applied to said peripheral transistor forming region; forming a first insulating film on the entire surface of said substrate; forming a first conductive film for the formation of a floating gate on said first insulating film; forming a second insulating film on said first conductive film; forming a second conductive film for protection on said second insulating film; forming a washing-resistant film on said second conductive film; removing those regions of said washing-resistant film, first and second conductive films, and first and second insulating films which are formed in said peripheral transistor region; injecting a dopant into said peripheral transistor forming region, with a mask applied to said memory cell forming region; forming a gate insulating film for said peripheral transistor by thermal oxidation in the peripheral transistor forming region; removing said washing-resistant film from the memory cell forming region; and forming a third conductive film, which will become a control gate of the memory cell and a gate of the peripheral transistor, on the second conductive film and the peripheral transistor forming region.
Claim 42
Independent Claim
215 words
A method of manufacturing a non-volatile semiconductor memory device, comprising the steps of: separating a semiconductor substrate into a memory cell forming region and a peripheral transistor forming region; injecting a dopant into said memory cell forming region, with a mask applied to said peripheral transistor forming region; forming a first insulating film on the entire surface of said substrate; forming a first conductive film for the formation of a floating gate on said first insulating film; forming a second insulating film on said first conductive film; forming a second conductive film for protection on said second insulating film; forming a washing-resistant film on said second conductive film; removing those regions of said washing-resistant film, first and second conductive films, and first and second insulating films which are formed in said peripheral transistor region; injecting a dopant into said peripheral transistor forming region, with a mask applied to said memory cell forming region; forming a gate insulating film for said peripheral transistor by thermal oxidation in the peripheral transistor forming region; removing said washing-resistant film from the memory cell forming region; and forming a third conductive film, which will become a control gate of the memory cell and a gate of the peripheral transistor, on the second conductive film and the peripheral transistor forming region.
Claim 43
Dependent Claim
31 words
The method of manufacturing a non-volatile semiconductor memory device according to claim 34, wherein said second conductive film and said third conductive film are integrated to function as a control gate.
Claim 44
Dependent Claim
27 words
The method of manufacturing a non-volatile semiconductor memory device according to claim 34, wherein each of said first, second and third conductive films is formed of polysilicon.
Claim 45
Dependent Claim
45 words
The method of manufacturing a non-volatile semiconductor memory device according to claim 34, wherein said second insulating film is of a three-layer structure including a central Si 3 N 4 film and two SiO 2 films having said Si 3 N 4 film interposed therebetween.
Claim 46
Dependent Claim
25 words
The method of manufacturing a non-volatile semiconductor memory device according to claim 34, wherein said washing-resistant film is made of Si 3 N 4 .
Claim 47
Independent Claim
173 words
A method of manufacturing a non-volatile semiconductor memory device in which a non-volatile memory cell and a peripheral transistor are formed on a semiconductor substrate, the method comprising the steps of: forming a first insulating film for the formation of a gate insulating film on at least a memory cell forming region of the semiconductor substrate having the memory cell forming region and a peripheral transistor forming region; forming a first conductive film for the formation of a floating gate on the first insulating film; forming a second insulating film on the first conductive film; forming a second conductive film on the second insulating film for protecting the second insulating film; forming an etching-resistant film on the second conductive film; subjecting the peripheral transistor forming region to a first process; removing the washing-resistant film; and forming a third conductive film, which will become a control gate of the memory cell and a gate of the peripheral transistor, on the second conductive film and the peripheral transistor forming region subjected to the first process.
Claim 48
Independent Claim
173 words
A method of manufacturing a non-volatile semiconductor memory device in which a non-volatile memory cell and a peripheral transistor are formed on a semiconductor substrate, the method comprising the steps of: forming a first insulating film for the formation of a gate insulating film on at least a memory cell forming region of the semiconductor substrate having the memory cell forming region and a peripheral transistor forming region; forming a first conductive film for the formation of a floating gate on the first insulating film; forming a second insulating film on the first conductive film; forming a second conductive film on the second insulating film for protecting the second insulating film; forming an etching-resistant film on the second conductive film; subjecting the peripheral transistor forming region to a first process; removing the washing-resistant film; and forming a third conductive film, which will become a control gate of the memory cell and a gate of the peripheral transistor, on the second conductive film and the peripheral transistor forming region subjected to the first process.
Claim 49
Dependent Claim
31 words
The method of manufacturing a non-volatile semiconductor memory device according to claim 39, wherein said second conductive film and said third conductive film are integrated to function as a control gate.
Claim 50
Dependent Claim
27 words
The method of manufacturing a non-volatile semiconductor memory device according to claim 39, wherein each of said first, second and third conductive films is formed of polysilicon.
Claim 51
Dependent Claim
45 words
The method of manufacturing a non-volatile semiconductor memory device according to claim 39, wherein said second insulating film is of a three-layer structure including a central Si 3 N 4 film and two SiO 2 films having said Si 3 N 4 film interposed therebetween.
Claim 52
Dependent Claim
25 words
The method of manufacturing a non-volatile semiconductor memory device according to claim 39, wherein said etching-resistant film is made of Si 3 N 4 .
Claim 53
Independent Claim
223 words
A method of manufacturing a non-volatile semiconductor memory device, comprising the steps of: separating a semiconductor substrate into a memory cell forming region and a peripheral transistor forming region; injecting a dopant into said memory cell forming region, with a mask applied to said peripheral transistor forming region; forming a first insulating film on the entire surface of said substrate; forming a first conductive film for the formation of a floating gate on that region of said first insulating film which is positioned on the memory cell forming region; forming a second insulating film on the entire surface; forming a second conductive film for protection on said second insulating film; forming an etching-resistant film on said second conductive film; removing those regions of said etching-resistant film, second conductive film, first and second insulating films which are formed in said peripheral transistor region; injecting a dopant into said peripheral transistor forming region, with a mask applied to said memory cell forming region; forming a gate insulating film for said peripheral transistor by thermal oxidation in the peripheral transistor forming region; removing said etching-resistant film from the memory cell forming region; and forming a third conductive film, which will become a control gate of the memory cell and a gate of the peripheral transistor, on the second conductive film and the peripheral transistor forming region.
Claim 54
Independent Claim
223 words
A method of manufacturing a non-volatile semiconductor memory device, comprising the steps of: separating a semiconductor substrate into a memory cell forming region and a peripheral transistor forming region; injecting a dopant into said memory cell forming region, with a mask applied to said peripheral transistor forming region; forming a first insulating film on the entire surface of said substrate; forming a first conductive film for the formation of a floating gate on that region of said first insulating film which is positioned on the memory cell forming region; forming a second insulating film on the entire surface; forming a second conductive film for protection on said second insulating film; forming an etching-resistant film on said second conductive film; removing those regions of said etching-resistant film, second conductive film, first and second insulating films which are formed in said peripheral transistor region; injecting a dopant into said peripheral transistor forming region, with a mask applied to said memory cell forming region; forming a gate insulating film for said peripheral transistor by thermal oxidation in the peripheral transistor forming region; removing said etching-resistant film from the memory cell forming region; and forming a third conductive film, which will become a control gate of the memory cell and a gate of the peripheral transistor, on the second conductive film and the peripheral transistor forming region.
Claim 55
Dependent Claim
31 words
The method of manufacturing a non-volatile semiconductor memory device according to claim 44, wherein said second conductive film and said third conductive film are integrated to function as a control gate.
Claim 56
Dependent Claim
27 words
The method of manufacturing a non-volatile semiconductor memory device according to claim 44, wherein each of said first, second and third conductive films is formed of polysilicon.
Claim 57
Dependent Claim
45 words
The method of manufacturing a non-volatile semiconductor memory device according to claim 44, wherein said second insulating film is of a three-layer structure including a central Si 3 N 4 film and two SiO 2 films having said Si 3 N 4 film interposed therebetween.
Claim 58
Dependent Claim
25 words
The method of manufacturing a non-volatile semiconductor memory device according to claim 44, wherein said washing-resistant film is made of Si 3 N 4 .
Claim 59
Independent Claim
215 words
A method of manufacturing a non-volatile semiconductor memory device, comprising the steps of: separating a semiconductor substrate into a memory cell forming region and a peripheral transistor forming region; injecting a dopant into said memory cell forming region, with a mask applied to said peripheral transistor forming region; forming a first insulating film on the entire surface of said substrate; forming a first conductive film for the formation of a floating gate on said first insulating film; forming a second insulating film on said first conductive film; forming a second conductive film for protection on said second insulating film; forming an etching-resistant film on said second conductive film; removing those regions of said etching-resistant film, first and second conductive films, and first and second insulating films which are formed in said peripheral transistor region; injecting a dopant into said peripheral transistor forming region, with a mask applied to said memory cell forming region; forming a gate insulating film for said peripheral transistor by thermal oxidation in the peripheral transistor forming region; removing said etching-resistant film from the memory cell forming region; and forming a third conductive film, which will become a control gate of the memory cell and a gate of the peripheral transistor, on the second conductive film and the peripheral transistor forming region.
Claim 60
Independent Claim
215 words
A method of manufacturing a non-volatile semiconductor memory device, comprising the steps of: separating a semiconductor substrate into a memory cell forming region and a peripheral transistor forming region; injecting a dopant into said memory cell forming region, with a mask applied to said peripheral transistor forming region; forming a first insulating film on the entire surface of said substrate; forming a first conductive film for the formation of a floating gate on said first insulating film; forming a second insulating film on said first conductive film; forming a second conductive film for protection on said second insulating film; forming an etching-resistant film on said second conductive film; removing those regions of said etching-resistant film, first and second conductive films, and first and second insulating films which are formed in said peripheral transistor region; injecting a dopant into said peripheral transistor forming region, with a mask applied to said memory cell forming region; forming a gate insulating film for said peripheral transistor by thermal oxidation in the peripheral transistor forming region; removing said etching-resistant film from the memory cell forming region; and forming a third conductive film, which will become a control gate of the memory cell and a gate of the peripheral transistor, on the second conductive film and the peripheral transistor forming region.
Claim 61
Dependent Claim
31 words
The method of manufacturing a non-volatile semiconductor memory device according to claim 49, wherein said second conductive film and said third conductive film are integrated to function as a control gate.
Claim 62
Dependent Claim
27 words
The method of manufacturing a non-volatile semiconductor memory device according to claim 49, wherein each of said first, second and third conductive films is formed of polysilicon.
Claim 63
Dependent Claim
45 words
The method of manufacturing a non-volatile semiconductor memory device according to claim 49, wherein said second insulating film is of a three-layer structure including a central Si 3 N 4 film and two SiO 2 films having said Si 3 N 4 film interposed therebetween.
Claim 64
Dependent Claim
25 words
The method of manufacturing a non-volatile semiconductor memory device according to claim 49, wherein said washing-resistant film is made of Si 3 N 4 .
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| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2001-02-09 | 2001-08-11 | 2002-02-10 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2005-02-09 | 2005-08-11 | 2006-02-10 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2009-02-09 | 2009-08-11 | 2010-02-10 | $7700.00 | Window Closed / Lapsed |