Semiconductor device having an interconnecting circuit board

Claim 1

A semiconductor device, comprising: an island formed in a predetermined plane; a first semiconductor chip having a plurality of electrically connecting electrode pads, the first chip being disposed on the island; a second semiconductor chip having a plurality of electrically connecting electrode pads, the second chip being disposed on the island; an electric connecting circuit board having a plurality of electrically connecting electrode pads and an electrically conductive pattern connected to the electrically connecting electrode pads, which is disposed on the island and between the first semiconductor chip and the second semiconductor chip; a plurality of inner leads disposed around the island; an interconnecting circuit board disposed on the inner leads and having an electrically conductive pattern; a first electrically connecting means for connecting a first one of the inner leads and the electrically conductive pattern of the interconnecting circuit board; a second electrically connecting means for connecting a second one of inner leads and a first one of electrically connecting electrode pads on the first chip; a third electrically connecting means for connecting a third one of the inner leads and a first one of the electrically connecting electrode pads on the circuit board; a fourth electrically connecting means for connecting a second one of the electrically connecting electrode pads on the circuit board and a second one of the electrically connecting electrode pads on the first chip; a fifth electrically connecting means for connecting a third one of the electrically connecting electrode pads on the circuit board and a first one of the electrically connecting electrode pads on the second chip; a sixth electrically connecting means for connecting a second one of the electrically connecting electrode pads on the second chip and a fourth one of the inner leads; and a seventh electrically connecting means for connecting a third one of the electrically connecting electrodes on the second chip and the electrically conductive pattern on the interconnecting circuit board.