US5672522A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Method for making selective subcollector heterojunction bipolar transistors
Assignee: Northrop Grumman Systems Corp
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Filing: 1996-03-05
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Granted: 1997-09-30
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Expires: 2016-03-05
Abstract
Abstract A method for fabricating an HBT in which the subcollector-base junction, which contributes to the base-collector capacitance of the device, is reduced by using a selective subcollector. In particular, subcollector areas of the device that do not contribute to collector resistance reduction are eliminated, thereby reducing the subcollector area, which, in turn, reduces the base-collector capacitance. As such, the maximum power-gain frequency f max is increased.
Inventors
- 👤 Dwight Christopher Streit
- 👤 Michael Lammert
- 👤 Aaron Kenji Oki
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-08 03:54
CPC Classifications
H; H10; H10P; H10P30/00; H10P30/20; H10P30/21; H10D; H10D10/00; H10D10/01; H10D10/021; H10D10/80; H10D10/821; H10P30/202; H10P30/206; H10W; H10W15/00; H10W15/01; H10D62/00; H10D62/80; H10D62/85; Y; Y10; Y10S; Y10S148/00; Y10S148/01; Y10S148/011; Y10S148/072
Claims Analysis
Total Claims: 8
Claim 1
Independent Claim
74 words
A method for fabricating a heterojunction bipolar transistor (HBT) with an increased maximum power gain frequency, comprising the steps of: (a) providing a substrate; (b) patterning a photo-resist over a portion of said substrate; (c) implanting silicon ions in a portion of said substrate not covered by said photo-resist, forming a subcollector; (d) forming collector, base and emitter regions over said subcollector; and (e) forming ohmic contacts on said collector, base and emitter regions.
Claim 2
Independent Claim
74 words
A method for fabricating a heterojunction bipolar transistor (HBT) with an increased maximum power gain frequency, comprising the steps of: (a) providing a substrate; (b) patterning a photo-resist over a portion of said substrate; (c) implanting silicon ions in a portion of said substrate not covered by said photo-resist, forming a subcollector; (d) forming collector, base and emitter regions over said subcollector; and (e) forming ohmic contacts on said collector, base and emitter regions.
Claim 3
Dependent Claim
12 words
A method as recited in claim 1, wherein said substrate is GaAs.
Claim 4
Dependent Claim
22 words
A method as recited in claim 1, wherein an acceleration energy of about 50 keV or greater is used for silicon-ion implantation.
Claim 5
Dependent Claim
19 words
A method as recited in claim 1, wherein a plurality of acceleration energies are used for said silicon-ion implantation.
Claim 6
Dependent Claim
21 words
A method as recited in claim 4, wherein each of said plurality of acceleration energies is greater than about 50 keV.
Claim 7
Dependent Claim
21 words
A method as recited in claim 4, wherein said plurality of acceleration energies vary about 50 keV to about 260 keV.
Claim 8
Dependent Claim
15 words
A method as recited in claim 1, wherein said subcollector is an N+ type material.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2000-09-29 | 2001-03-31 | 2001-09-30 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2004-09-29 | 2005-03-31 | 2005-09-30 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2008-09-29 | 2009-03-31 | 2009-09-30 | $7700.00 | Window Closed / Lapsed |