Method of defining a line width

Claim 1

A method of defining a line width, the method comprising the steps of: providing a spacer having a width; depositing a layer over the spacer; and using the width of the spacer to define the line width by removing the spacer to form a hole in the layer, the hole having the line width.

Claim 2

A method of defining a line width, the method comprising the steps of: providing a spacer having a width; depositing a layer over the spacer; and using the width of the spacer to define the line width by removing the spacer to form a hole in the layer, the hole having the line width.

Claim 7

A method of making a semiconductor device, the method comprising the steps of: providing a spacer having a width; using the width of the spacer to define a line width, wherein the step of using the width of the spacer to define the line width includes using the spacer as an etch mask; providing a substrate under the spacer; and forming a temporary structure over the substrate, wherein the step of using the width of the spacer to define the line width includes using the width of the spacer to define a line width of the temporary structure.

Claim 8

A method of making a semiconductor device, the method comprising the steps of: providing a spacer having a width; using the width of the spacer to define a line width, wherein the step of using the width of the spacer to define the line width includes using the spacer as an etch mask; providing a substrate under the spacer; and forming a temporary structure over the substrate, wherein the step of using the width of the spacer to define the line width includes using the width of the spacer to define a line width of the temporary structure.

Claim 12

A method of manufacturing a semiconductor device, the method comprising the steps of: providing a spacer having a width; using the width of the spacer to define a line width, wherein the step of providing the spacer includes providing a temporary structure comprised of the spacer; providing a substrate under the spacer; providing an electrically insulating layer over the temporary structure and the substrate; removing a first portion of the electrically insulating layer to expose a second portion of the temporary structure; and removing the temporary structure to form an opening over the substrate, the opening defined by the temporary structure.

Claim 13

A method of manufacturing a semiconductor device, the method comprising the steps of: providing a spacer having a width; using the width of the spacer to define a line width, wherein the step of providing the spacer includes providing a temporary structure comprised of the spacer; providing a substrate under the spacer; providing an electrically insulating layer over the temporary structure and the substrate; removing a first portion of the electrically insulating layer to expose a second portion of the temporary structure; and removing the temporary structure to form an opening over the substrate, the opening defined by the temporary structure.

Claim 15

A method of forming a semiconductor component, the method comprising the steps of: providing a substrate; forming a spacer having a width, the spacer located over the substrate; covering the spacer with a dielectric layer; exposing a portion of the spacer; forming an opening over the substrate by etching the spacer; and depositing an electrically conductive layer in the opening.

Claim 16

A method of forming a semiconductor component, the method comprising the steps of: providing a substrate; forming a spacer having a width, the spacer located over the substrate; covering the spacer with a dielectric layer; exposing a portion of the spacer; forming an opening over the substrate by etching the spacer; and depositing an electrically conductive layer in the opening.

Claim 20

A method of fabricating a semiconductor component, the method comprising the steps of: providing a semiconductor substrate; depositing a first dielectric layer over the semiconductor substrate; depositing a second dielectric layer over the first dielectric layer; using the second dielectric layer to form a spacer over the first dielectric layer; using the first dielectric layer and the spacer to create a temporary structure over the semiconductor substrate; depositing a third dielectric layer over the temporary structure; planarizing the third dielectric layer to expose the temporary structure; forming an opening over the semiconductor substrate by removing the temporary structure; and depositing an electrically conductive layer in the opening.

Claim 21

A method of fabricating a semiconductor component, the method comprising the steps of: providing a semiconductor substrate; depositing a first dielectric layer over the semiconductor substrate; depositing a second dielectric layer over the first dielectric layer; using the second dielectric layer to form a spacer over the first dielectric layer; using the first dielectric layer and the spacer to create a temporary structure over the semiconductor substrate; depositing a third dielectric layer over the temporary structure; planarizing the third dielectric layer to expose the temporary structure; forming an opening over the semiconductor substrate by removing the temporary structure; and depositing an electrically conductive layer in the opening.

Claim 24

A method of making a semiconductor component, the method comprising the steps of: providing a semiconductor substrate; depositing a gate layer over the semiconductor substrate; depositing a first dielectric layer over the gate layer; using the first dielectric layer to form a spacer over the gate layer, the spacer having a width; and transferring the width of the spacer into the gate layer to produce a gate electrode having a gate length substantially equal to the width of the spacer.

Claim 25

A method of making a semiconductor component, the method comprising the steps of: providing a semiconductor substrate; depositing a gate layer over the semiconductor substrate; depositing a first dielectric layer over the gate layer; using the first dielectric layer to form a spacer over the gate layer, the spacer having a width; and transferring the width of the spacer into the gate layer to produce a gate electrode having a gate length substantially equal to the width of the spacer.

Claim 26

A method of making a semiconductor component, the method comprising the steps of: providing a semiconductor substrate; depositing a gate layer over the semiconductor substrate; depositing a first dielectric layer over the gate layer; using the first dielectric layer to form a spacer over the gate layer, the spacer having a width; transferring the width of the spacer into the gate layer to produce a gate electrode having a gate length substantially equal to the width of the spacer, wherein the step of transferring the width of the spacer into the gate layer includes anisotropically etching the gate layer and wherein the step of using the first dielectric layer to form the spacer includes the steps of: etching the first dielectric layer to form a temporary structure; depositing a second dielectric layer over the first dielectric layer and over the gate layer; anisotropically etching the second dielectric layer to form the spacer adjacent to the temporary structure; and removing the temporary structure.

Claim 27

A method of making a semiconductor component, the method comprising the steps of: providing a semiconductor substrate; depositing a gate layer over the semiconductor substrate; depositing a first dielectric layer over the gate layer; using the first dielectric layer to form a spacer over the gate layer, the spacer having a width; transferring the width of the spacer into the gate layer to produce a gate electrode having a gate length substantially equal to the width of the spacer, wherein the step of transferring the width of the spacer into the gate layer includes anisotropically etching the gate layer and wherein the step of using the first dielectric layer to form the spacer includes the steps of: etching the first dielectric layer to form a temporary structure; depositing a second dielectric layer over the first dielectric layer and over the gate layer; anisotropically etching the second dielectric layer to form the spacer adjacent to the temporary structure; and removing the temporary structure.