US5384273A
Expired / Lapsed
US
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Method of making a semiconductor device having a short gate length
Assignee: NXP USA Inc
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Filing: 1994-04-26
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Granted: 1995-01-24
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Expires: 2014-04-26
Abstract
Abstract A semiconductor device having a short gate length is fabricated. The short gate length is obtained by utilizing the fact that an unannealed silicon nitride can be isotropically etched while not etching an annealed silicon nitride layer. The method comprises forming a first silicon nitride 13 on a semiconductor material 10, annealing layer 13, forming an insulating layer 15, a second silicon nitride layer 17 and a masking layer 19, undercutting a portion of layers 17 and 15, removing the masking layer, annealing the second silicon nitride 17, implanting to form channel region 20 having portions 21 and 22, undercutting a portion of the insulating layer 15, removing the second silicon nitride 17 and the first silicon nitride 13 not covered by layer 15, forming gate 23 having effective gate length 30 and source/drain 25/26.
Inventors
- 👤 Robert B. Davies
- 👤 Charles B. Anderson
- 👤 Lawrence S. Klingbeil, Jr.
- 👤 George B. Norris
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-01 20:52
CPC Classifications
H; H10; H10D; H10D30/00; H10D30/01; H10D30/061; H10D30/0612; H10D30/0616; H10D30/80; H10D30/87; H10D62/00; H10D62/10; H10D62/13; H10D62/149; H10D62/161; H10D64/00; H10D64/20; H10D64/27; H10D64/311; H10D64/411; H10P; H10P14/00; H10P14/20; H10P14/32; H10P14/3202; H10P14/3214; H10P14/3216; H10P14/34; H10P14/3402; H10P14/3414; H10P14/3416; H10P14/60; H10P14/69; H10P14/694; H10P14/6943; H10P14/69433; H10P30/00; H10P30/20; H10P30/22; H10P50/00; H10P50/73; H10P95/00; H10P95/90; Y; Y10; Y10S; Y10S438/00; Y10S438/965
Claims Analysis
Total Claims: 18
Claim 1
Independent Claim
189 words
A method of fabricating a channel region of a semiconductor device, comprising the steps of: providing a semiconductor material, having a top surface; forming a first silicon nitride layer over the top surface of the semiconductor material; annealing the first silicon nitride layer; forming an insulating layer over the silicon nitride layer; forming a second silicon nitride layer over the insulating layer; forming a masking layer over a portion of the second silicon nitride layer; isotropically etching a portion of the second silicon nitride layer and a portion of the insulating layer, using the masking layer as a mask; removing the masking layer; annealing the second silicon nitride layer after the step of removing the masking layer; ion implanting a channel region into the semiconductor material so that the channel region has a first and a second portion wherein the first portion extends deeper into the semiconductor material from the top surface than the second portion; isotropically etching a portion of the insulating layer; and removing the second silicon nitride layer and a portion of the first silicon nitride layer which does not have the insulating layer formed thereover.
Claim 2
Independent Claim
189 words
A method of fabricating a channel region of a semiconductor device, comprising the steps of: providing a semiconductor material, having a top surface; forming a first silicon nitride layer over the top surface of the semiconductor material; annealing the first silicon nitride layer; forming an insulating layer over the silicon nitride layer; forming a second silicon nitride layer over the insulating layer; forming a masking layer over a portion of the second silicon nitride layer; isotropically etching a portion of the second silicon nitride layer and a portion of the insulating layer, using the masking layer as a mask; removing the masking layer; annealing the second silicon nitride layer after the step of removing the masking layer; ion implanting a channel region into the semiconductor material so that the channel region has a first and a second portion wherein the first portion extends deeper into the semiconductor material from the top surface than the second portion; isotropically etching a portion of the insulating layer; and removing the second silicon nitride layer and a portion of the first silicon nitride layer which does not have the insulating layer formed thereover.
Claim 3
Dependent Claim
34 words
The method of claim 1 wherein the step of isotropically etching a portion of the second silicon nitride layer and a portion of the insulating layer comprises etching with a hydrofluoric acid based etchant.
Claim 4
Dependent Claim
43 words
The method of claim 1 wherein the step of isotropically etching a portion of the second silicon nitride layer and a portion of the insulating layer comprises etching with a hydrofluoric acid based etchant performed by alternately spraying and soaking the semiconductor material.
Claim 5
Dependent Claim
116 words
The method of claim 1 wherein the step of isotropically etching a portion of the second silicon nitride layer and a portion of the insulating layer comprises etching with a hydrofluoric acid based etchant performed by alternately spraying and soaking the semiconductor material according to the following equations: T.sub.spray =e.sup.(x-1) where x={0, 1, 2, 3, 4, . . . A-1, A} and T.sub.soak =e.sup.(y-1) where y={A, A-1, . . . , 4, 3, 2, 1, 0} where x+y=A and T spray is the amount of time the semiconductor material is sprayed with the hydrofluoric acid based etchant and T soak is the amount of time the semiconductor material is soaked with the hydrofluoric acid based etchant.
Claim 6
Dependent Claim
41 words
The method of claim 1 further comprising the step of selectively etching a portion of the second silicon nitride layer before the step of isotropically etching a portion of the second silicon nitride layer and a portion of the insulating layer.
Claim 7
Independent Claim
229 words
A method of fabricating a channel region of a semiconductor device, comprising the steps of: providing a semiconductor material, having a top surface; forming a first silicon nitride layer over the top surface of the semiconductor material; annealing the first silicon nitride layer; forming an insulating layer over the silicon nitride layer; forming a second silicon nitride layer over the insulating layer; forming a masking layer over a portion of the second silicon nitride layer; undercutting a portion of the second silicon nitride layer and a portion of the insulating layer; removing the masking layer; annealing the second silicon nitride layer after the step of removing the masking layer; ion implanting a channel region into the semiconductor material so that the channel region has a first and a second portion wherein the first portion extends deeper into the semiconductor material from the top surface than the second portion; undercutting a portion of the insulating layer; removing the second silicon nitride layer and a portion of the first silicon nitride layer which does not have the insulating layer formed thereover; and forming a gate layer on the top surface of the semiconductor material over a portion of the first and the second portions of the channel region; and forming a source region and a drain region in a portion of the semiconductor material, using the gate layer as a mask.
Claim 8
Independent Claim
229 words
A method of fabricating a channel region of a semiconductor device, comprising the steps of: providing a semiconductor material, having a top surface; forming a first silicon nitride layer over the top surface of the semiconductor material; annealing the first silicon nitride layer; forming an insulating layer over the silicon nitride layer; forming a second silicon nitride layer over the insulating layer; forming a masking layer over a portion of the second silicon nitride layer; undercutting a portion of the second silicon nitride layer and a portion of the insulating layer; removing the masking layer; annealing the second silicon nitride layer after the step of removing the masking layer; ion implanting a channel region into the semiconductor material so that the channel region has a first and a second portion wherein the first portion extends deeper into the semiconductor material from the top surface than the second portion; undercutting a portion of the insulating layer; removing the second silicon nitride layer and a portion of the first silicon nitride layer which does not have the insulating layer formed thereover; and forming a gate layer on the top surface of the semiconductor material over a portion of the first and the second portions of the channel region; and forming a source region and a drain region in a portion of the semiconductor material, using the gate layer as a mask.
Claim 9
Dependent Claim
33 words
The method of claim 6 wherein the step of undercutting a portion of the second silicon nitride layer and a portion of the insulating layer comprises etching with a hydrofluoric acid based etchant.
Claim 10
Dependent Claim
42 words
The method of claim 6 wherein the step of undercutting a portion of the second silicon nitride layer and a portion of the insulating layer comprises etching with a hydrofluoric acid based etchant performed by alternately spraying and soaking the semiconductor material.
Claim 11
Dependent Claim
115 words
The method of claim 6 wherein the step of undercutting a portion of the second silicon nitride layer and a portion of the insulating layer comprises etching with a hydrofluoric acid based etchant performed by alternately spraying and soaking the semiconductor material according to the following equations: T.sub.spray =e.sup.(x-1) where x={0, 1, 2, 3, 4, . . . A-1, A} and T.sub.soak =e.sup.(y-1) where y={A, A-1, . . . , 4, 3, 2, 1, 0} where x+y=A and T spray is the amount of time the semiconductor material is sprayed with the hydrofluoric acid based etchant and T soak is the amount of time the semiconductor material is soaked with the hydrofluoric acid based etchant.
Claim 12
Dependent Claim
40 words
The method of claim 6 further comprising the step of selectively etching a portion of the second silicon nitride layer before the step of undercutting a portion of the second silicon nitride layer and a portion of the insulating layer.
Claim 13
Independent Claim
273 words
A method of fabricating a channel region of a semiconductor device, comprising the steps of: providing a semiconductor material, having a top surface; forming a first silicon nitride layer over the top surface of the semiconductor material; forming an insulating layer over the silicon nitride layer; performing an anneal step to anneal the first silicon nitride layer and the insulating layer; forming a second silicon nitride layer over the insulating layer; forming a masking layer over a portion of the second silicon nitride layer; isotropically etching a portion of the second silicon nitride layer and a portion of the insulating layer using the masking layer as a mask, while not etching the first silicon nitride layer, wherein the first silicon nitride layer is not etched because the first silicon nitride layer has been annealed; removing the masking layer; performing an anneal step to anneal the second silicon nitride layer after the step of removing the masking layer; ion implanting a channel region into the semiconductor material so that the channel region has a first and a second portion wherein the first portion extends deeper into the semiconductor material from the top surface than the second portion; isotropically etching a portion of the insulating layer, while not etching the first silicon nitride layer and the second silicon nitride layer, wherein the first silicon nitride layer and the second silicon nitride layer are not etched because the first silicon nitride layer and the second silicon nitride layer has been annealed; and removing the second silicon nitride layer and a portion of the first silicon nitride layer which does not have the insulating layer formed thereover.
Claim 14
Independent Claim
273 words
A method of fabricating a channel region of a semiconductor device, comprising the steps of: providing a semiconductor material, having a top surface; forming a first silicon nitride layer over the top surface of the semiconductor material; forming an insulating layer over the silicon nitride layer; performing an anneal step to anneal the first silicon nitride layer and the insulating layer; forming a second silicon nitride layer over the insulating layer; forming a masking layer over a portion of the second silicon nitride layer; isotropically etching a portion of the second silicon nitride layer and a portion of the insulating layer using the masking layer as a mask, while not etching the first silicon nitride layer, wherein the first silicon nitride layer is not etched because the first silicon nitride layer has been annealed; removing the masking layer; performing an anneal step to anneal the second silicon nitride layer after the step of removing the masking layer; ion implanting a channel region into the semiconductor material so that the channel region has a first and a second portion wherein the first portion extends deeper into the semiconductor material from the top surface than the second portion; isotropically etching a portion of the insulating layer, while not etching the first silicon nitride layer and the second silicon nitride layer, wherein the first silicon nitride layer and the second silicon nitride layer are not etched because the first silicon nitride layer and the second silicon nitride layer has been annealed; and removing the second silicon nitride layer and a portion of the first silicon nitride layer which does not have the insulating layer formed thereover.
Claim 15
Dependent Claim
34 words
The method of claim 11 wherein the step of isotropically etching a portion of the second silicon nitride layer and a portion of the insulating layer comprises etching with a hydrofluoric acid based etchant.
Claim 16
Dependent Claim
43 words
The method of claim 11 wherein the step of isotropically etching a portion of the second silicon nitride layer and a portion of the insulating layer comprises etching with a hydrofluoric acid based etchant performed by alternately spraying and soaking the semiconductor material.
Claim 17
Dependent Claim
116 words
The method of claim 11 wherein the step of isotropically etching a portion of the second silicon nitride layer and a portion of the insulating layer comprises etching with a hydrofluoric acid based etchant performed by alternately spraying and soaking the semiconductor material according to the following equations: T.sub.spray =e.sup.(x-1) where x={0, 1, 2, 3, 4, . . . A-1, A} and T.sub.soak =e.sup.(y-1) where y={A, A-1, . . . , 4, 3, 2, 1, 0} where x+y=A and T spray is the amount of time the semiconductor material is sprayed with the hydrofluoric acid based etchant and T soak is the amount of time the semiconductor material is soaked with the hydrofluoric acid based etchant.
Claim 18
Dependent Claim
41 words
The method of claim 11 further comprising the step of selectively etching a portion of the second silicon nitride layer before the step of isotropically etching a portion of the second silicon nitride layer and a portion of the insulating layer.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
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| 3.5 Years (Year 4) | 1998-01-23 | 1998-07-25 | 1999-01-24 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2002-01-23 | 2002-07-25 | 2003-01-24 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2006-01-23 | 2006-07-25 | 2007-01-24 | $7700.00 | Window Closed / Lapsed |