Patent US5663102A successfully refreshed from Google Patents.
US5663102A
Expired / Lapsed
US
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Method for forming multi-layered metal wiring semiconductor element using cmp or etch back
Assignee: SK Hynix Inc
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Filing: 1996-07-29
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Granted: 1997-09-02
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Expires: 2016-07-29
Abstract
Abstract A method for forming a Damascene structured multi-layered metal wiring for a semiconductor element, which includes the steps for forming a first insulating layer on the surface of a semiconductor substrate, forming a lower metal wiring pattern on the first insulating layer, forming a second insulating layer on the first insulating layer and the lower metal wiring pattern, forming contacts by subjecting the second insulating layer to etching, successively depositing first and second upper metals over the second insulating layer and the contact, subjecting the second upper metal to etching until the first upper metal is exposed, and forming an upper metal wiring pattern having a double metal structure by subjecting the first upper metal to etching until the second insulating layer is exposed. The upper wiring layer is preferably formed of aluminum deposited by a sputtering method and tungsten deposited by a chemical vapor deposition method.
Inventors
- 👤 Nae Hak Park
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-30 15:06
CPC Classifications
H; H10; H10W; H10W20/00; H10W20/01; H10W20/071; H10W20/081; H10W20/031; H10W20/062; H10W20/40; H10W20/41; H10W20/42; H10W20/425; H10W20/44; H10W20/4403; H10W20/4437; H10W20/4441
Claims Analysis
Total Claims: 24
Claim 1
Independent Claim
149 words
A method for forming a multi-layered metal wiring for a semiconductor element, the method comprising the steps of: forming a first insulating layer on a surface of a semiconductor substrate; forming a lower metal wiring pattern on the first insulating layer; forming a second insulating layer on the first insulating layer and the lower metal wiring pattern; forming contact portions in the second insulating layer; successively depositing first and second upper metals over the contact portions and the second insulating layer; removing portions of the second upper metal by subjecting said second upper metal to an etch back process until the first upper metal is exposed; and removing portions of the first upper metal by subjecting said first upper metal to a chemical mechanical polishing process until the second insulating layer is exposed, thereby to form an upper metal wiring pattern comprised of the first and second upper metals.
Claim 2
Independent Claim
149 words
A method for forming a multi-layered metal wiring for a semiconductor element, the method comprising the steps of: forming a first insulating layer on a surface of a semiconductor substrate; forming a lower metal wiring pattern on the first insulating layer; forming a second insulating layer on the first insulating layer and the lower metal wiring pattern; forming contact portions in the second insulating layer; successively depositing first and second upper metals over the contact portions and the second insulating layer; removing portions of the second upper metal by subjecting said second upper metal to an etch back process until the first upper metal is exposed; and removing portions of the first upper metal by subjecting said first upper metal to a chemical mechanical polishing process until the second insulating layer is exposed, thereby to form an upper metal wiring pattern comprised of the first and second upper metals.
Claim 3
Dependent Claim
33 words
The method as claimed in claim 1, wherein the first upper metal is aluminum deposited by a sputtering method, and the second upper metal is tungsten deposited by a chemical vapor deposition method.
Claim 4
Dependent Claim
33 words
The method as claimed in claim 1, wherein the first upper metal is tungsten deposited by a chemical vapor deposition method, and the second upper metal is aluminum deposited by a sputtering method.
Claim 5
Dependent Claim
33 words
The method as claimed in claim 1, wherein the first upper metal is deposited to a thickness of 500-2000 Å and the second upper metal is deposited to a thickness of 500-5000 Å.
Claim 6
Dependent Claim
55 words
The method as claimed in claim 1, wherein the contact portions forming step includes, photoetching parts of the second insulating layer using a first photo-mask to define channels for the upper metal wiring pattern, and forming the contact portions by selectively photoetching portions of the second insulating layer to expose the lower metal wiring layer.
Claim 7
Independent Claim
135 words
A method for forming multi-layered metal wiring for a semiconductor element comprising: forming a first insulating layer on a semiconductor substrate; forming a lower metal wiring pattern on the first insulating layer; forming a second insulating layer on the first insulating layer; forming contact portions in the second insulating layer; successively depositing first, second, and third upper metals over the second insulating layer, including the contact portions; removing portions of the second and the third upper metals by subjecting the second and third upper metal layer to an etch back process until the first upper metal is exposed; and forming an upper metal wiring pattern comprising three metals by removing portions of the first upper metal by subjecting the first upper metal to a chemical mechanical polishing process until the second insulating layer is exposed.
Claim 8
Independent Claim
135 words
A method for forming multi-layered metal wiring for a semiconductor element comprising: forming a first insulating layer on a semiconductor substrate; forming a lower metal wiring pattern on the first insulating layer; forming a second insulating layer on the first insulating layer; forming contact portions in the second insulating layer; successively depositing first, second, and third upper metals over the second insulating layer, including the contact portions; removing portions of the second and the third upper metals by subjecting the second and third upper metal layer to an etch back process until the first upper metal is exposed; and forming an upper metal wiring pattern comprising three metals by removing portions of the first upper metal by subjecting the first upper metal to a chemical mechanical polishing process until the second insulating layer is exposed.
Claim 9
Dependent Claim
52 words
The method as claimed in claim 6, wherein the first upper metal is formed of tungsten deposited by a chemical vapor deposition method, the second upper metal is formed of aluminum deposited by a sputtering method, and the third upper metal is formed of tungsten deposited by a chemical vapor deposition method.
Claim 10
Dependent Claim
45 words
The method as claimed in claim 7, wherein the first upper metal is deposited to a thickness of 500-2000 Å, the second upper metal is deposited to a thickness of 500-2000 Å, and the third upper metal is deposited to a thickness of 500-5000 Å.
Claim 11
Independent Claim
149 words
A method for forming a multi-layered metal wiring for a semiconductor element, the method comprising the steps of: forming a first insulating layer on a surface of a semiconductor substrate; forming a lower metal wiring pattern on the first insulating layer; forming a second insulating layer on the first insulating layer and the lower metal wiring pattern; forming contact portions in the second insulating layer; successively depositing first and second upper metals over the contact portions and the second insulating layer; removing portions of the second upper metal by subjecting said second upper metal to a chemical mechanical polishing process until the first upper metal is exposed; and removing portions of the first upper metal by subjecting said first upper metal to an etch back process until the second insulating layer is exposed, thereby to form an upper metal wiring pattern comprised of the first and second upper metals.
Claim 12
Independent Claim
149 words
A method for forming a multi-layered metal wiring for a semiconductor element, the method comprising the steps of: forming a first insulating layer on a surface of a semiconductor substrate; forming a lower metal wiring pattern on the first insulating layer; forming a second insulating layer on the first insulating layer and the lower metal wiring pattern; forming contact portions in the second insulating layer; successively depositing first and second upper metals over the contact portions and the second insulating layer; removing portions of the second upper metal by subjecting said second upper metal to a chemical mechanical polishing process until the first upper metal is exposed; and removing portions of the first upper metal by subjecting said first upper metal to an etch back process until the second insulating layer is exposed, thereby to form an upper metal wiring pattern comprised of the first and second upper metals.
Claim 13
Dependent Claim
33 words
The method as claimed in claim 9, wherein the first upper metal is aluminum deposited by a sputtering method, and the second upper metal is tungsten deposited by a chemical vapor deposition method.
Claim 14
Dependent Claim
33 words
The method as claimed in claim 9, wherein the first upper metal is tungsten deposited by a chemical vapor deposition method, and the second upper metal is aluminum deposited by a sputtering method.
Claim 15
Dependent Claim
33 words
The method as claimed in claim 9, wherein the first upper metal is deposited to a thickness of 500-2000 Å and the second upper metal is deposited to a thickness of 500-5000 Å.
Claim 16
Dependent Claim
55 words
The method as claimed in claim 9, wherein the contact portions forming step includes, photoetching parts of the second insulating layer using a first photo-mask to define channels for the upper metal wiring pattern, and forming the contact portions by selectively photoetching portions of the second insulating layer to expose the lower metal wiring layer.
Claim 17
Independent Claim
159 words
A method for forming a multi-layered metal wiring for a semiconductor element, the method comprising the steps of: forming a first insulating layer on a surface of semiconductor substrate; forming a lower metal wiring pattern on the first insulating layer; forming a second insulating layer on the first insulating layer and the lower metal wiring pattern; forming contact portions in the second insulating layer; successively depositing first and second upper metals over the contact portions and the second insulating layer; removing portions of the second upper metal by subjecting said second upper metal to a first chemical mechanical polishing process until the first upper metal is exposed; and removing portions of the first upper metal by subjecting said first upper metal to a second chemical mechanical polishing process separate from said first chemical mechanical polishing process until the second insulating layer is exposed, thereby to form an upper metal wiring pattern comprised of the first and second upper metals.
Claim 18
Independent Claim
159 words
A method for forming a multi-layered metal wiring for a semiconductor element, the method comprising the steps of: forming a first insulating layer on a surface of semiconductor substrate; forming a lower metal wiring pattern on the first insulating layer; forming a second insulating layer on the first insulating layer and the lower metal wiring pattern; forming contact portions in the second insulating layer; successively depositing first and second upper metals over the contact portions and the second insulating layer; removing portions of the second upper metal by subjecting said second upper metal to a first chemical mechanical polishing process until the first upper metal is exposed; and removing portions of the first upper metal by subjecting said first upper metal to a second chemical mechanical polishing process separate from said first chemical mechanical polishing process until the second insulating layer is exposed, thereby to form an upper metal wiring pattern comprised of the first and second upper metals.
Claim 19
Independent Claim
134 words
A method for forming multi-layered metal wiring for a semiconductor element comprising: forming a first insulating layer on a semiconductor substrate; forming a lower metal wiring pattern on the first insulating layer; forming a second insulating layer on the first insulating layer; forming contact portions in the second insulating layer; successively depositing first, second, and third upper metals over the second insulating layer, including the contact portions; removing portions of the second and the third upper metals by subjecting said second and third upper metals to a chemical mechanical polishing process until the first upper metal is exposed; and forming an upper metal wiring pattern comprising three metals by removing portions of the first upper metal by subjecting said first upper metal to an etch back process until the second insulating layer is exposed.
Claim 20
Independent Claim
134 words
A method for forming multi-layered metal wiring for a semiconductor element comprising: forming a first insulating layer on a semiconductor substrate; forming a lower metal wiring pattern on the first insulating layer; forming a second insulating layer on the first insulating layer; forming contact portions in the second insulating layer; successively depositing first, second, and third upper metals over the second insulating layer, including the contact portions; removing portions of the second and the third upper metals by subjecting said second and third upper metals to a chemical mechanical polishing process until the first upper metal is exposed; and forming an upper metal wiring pattern comprising three metals by removing portions of the first upper metal by subjecting said first upper metal to an etch back process until the second insulating layer is exposed.
Claim 21
Dependent Claim
52 words
The method as claimed in claim 15, wherein the first upper metal is formed of tungsten deposited by a chemical vapor deposition method, the second upper metal is formed of aluminum deposited by a sputtering method, and the third upper metal is formed of tungsten deposited by a chemical vapor deposition method.
Claim 22
Dependent Claim
45 words
The method as claimed in claim 15, wherein the first upper metal is deposited to a thickness of 500-2000 Å, the second upper metal is deposited to a thickness of 500-2000 Å, and the third upper metal is deposited to a thickness of 500-5000 Å.
Claim 23
Independent Claim
139 words
A method for forming multi-layered metal wiring for a semiconductor element comprising: forming a first insulating layer on a semiconductor substrate; forming a lower metal wiring pattern on the first insulating layer; forming a second insulating layer on the first insulating layer; forming contact portions in the second insulating layer; successively depositing first, second, and third upper metals over the second insulating layer, including the contact portions; removing portions of the second and the third upper metals by subjecting said second and third upper metal to a first chemical mechanical polishing process until the first upper metal is exposed; and forming an upper metal wiring pattern comprising three metals by removing portions of the first upper metal using a second chemical mechanical polishing process separate from said first chemical mechanical polishing process until the second insulating layer is exposed.
Claim 24
Independent Claim
139 words
A method for forming multi-layered metal wiring for a semiconductor element comprising: forming a first insulating layer on a semiconductor substrate; forming a lower metal wiring pattern on the first insulating layer; forming a second insulating layer on the first insulating layer; forming contact portions in the second insulating layer; successively depositing first, second, and third upper metals over the second insulating layer, including the contact portions; removing portions of the second and the third upper metals by subjecting said second and third upper metal to a first chemical mechanical polishing process until the first upper metal is exposed; and forming an upper metal wiring pattern comprising three metals by removing portions of the first upper metal using a second chemical mechanical polishing process separate from said first chemical mechanical polishing process until the second insulating layer is exposed.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2000-09-01 | 2001-03-03 | 2001-09-02 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2004-09-01 | 2005-03-03 | 2005-09-02 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2008-09-01 | 2009-03-03 | 2009-09-02 | $7700.00 | Window Closed / Lapsed |