Process for forming a conductive layer for semiconductor devices

Claim 2

A process for forming a semiconductor device comprising the steps of: forming an interconnecting member over a semiconductor substrate, wherein the interconnecting member is formed by steps including: forming a conductive layer over the substrate, wherein: the conductive layer includes an alloy; and the alloy includes aluminum, nickel, and chromium, but no silicon; and etching the conductive layer, wherein the conductive layer extends along all of the interconnecting member; and forming a passivation layer over the interconnecting member.

Claim 3

The process of claim 1, further comprising steps of: forming a conductor, wherein the conductor is selected from a group consisting of a doped region lying within a semiconductor substrate, a gate electrode overlying the substrate, a silicon-containing electrode overlying the substrate, and a metal-containing member overlying the substrate; and forming an insulating layer over the conductor and including an opening, wherein at least a portion of the conductor is exposed within the opening, wherein the step of forming the conductive layer is performed such that at least a portion of the conductive layer is formed over the insulating layer, and wherein the conductive layer is electrically connected to the conductor.

Claim 4

The process of claim 1, further comprising a step of annealing the interconnecting member after the step of forming the passivation layer.

Claim 5

The process of claim 1, wherein the step of forming the conductive layer is performed such that the conductive layer includes at least 95 weight percent aluminum, no more than 0.5 weight percent nickel, and no more than 0.5 weight percent chromium.

Claim 6

The process of claim 4, wherein the step of forming the conductive layer is performed such that the conductive layer includes at least 99 weight percent aluminum, between about 0.1-0.5 weight percent nickel, and between about 0.02-0.1 weight percent chromium.

Claim 7

The process of claim 5, wherein the step of forming the conductive layer is performed such that the alloy consists of aluminum, nickel, and chromium.

Claim 8

The process of claim 1, wherein the step of forming the interconnecting member further comprises steps of: forming a barrier layer prior to the step of forming the conductive layer; and forming an antireflective coating after the step of forming the conductive layer.

Claim 9

The process of claim 7, wherein the step of forming the interconnecting member further comprises a step of forming a glue layer before the step of forming the barrier layer.

Claim 10

A process for forming a semiconductor device comprising the steps of: forming a conductor, wherein the conductor is selected from a group consisting of a doped region lying within a semiconductor substrate, a gate electrode overlying the substrate, a silicon-containing electrode overlying the substrate, and a metal-containing member overlying the substrate; forming an insulating layer over the conductor and including an opening, wherein at least a portion of the conductor is exposed within the opening; forming an interconnecting member over the insulating layer and electrically connected to the conductor, wherein the interconnecting member is formed by steps including: forming a conductive layer, wherein: the conductive layer includes an alloy; the alloy includes at least 99 weight percent aluminum, about 0.1-0.5 weight percent nickel, and about 0.02-0.1 weight percent chromium, but no silicon; and a portion of the conductive layer is formed over the insulating layer and another portion of the conductive layer is formed at a location that is selected from a group consisting of overlying the opening of the insulating layer and lying within the opening of the insulating layer; etching the conductive layer, wherein the conductive layer extends along all of the interconnecting member; and forming a passivation layer over the interconnecting member.

Claim 11

A process for forming a semiconductor device comprising the steps of: forming a conductor, wherein the conductor is selected from a group consisting of a doped region lying within a semiconductor substrate, a gate electrode overlying the substrate, a silicon-containing electrode overlying the substrate, and a metal-containing member overlying the substrate; forming an insulating layer over the conductor and including an opening, wherein at least a portion of the conductor is exposed within the opening; forming an interconnecting member over the insulating layer and electrically connected to the conductor, wherein the interconnecting member is formed by steps including: forming a conductive layer, wherein: the conductive layer includes an alloy; the alloy includes at least 99 weight percent aluminum, about 0.1-0.5 weight percent nickel, and about 0.02-0.1 weight percent chromium, but no silicon; and a portion of the conductive layer is formed over the insulating layer and another portion of the conductive layer is formed at a location that is selected from a group consisting of overlying the opening of the insulating layer and lying within the opening of the insulating layer; etching the conductive layer, wherein the conductive layer extends along all of the interconnecting member; and forming a passivation layer over the interconnecting member.

Claim 12

The process of claim 9, wherein the step of forming the conductive layer is performed such that the alloy consists of aluminum, nickel, and chromium.

Claim 13

The process of claim 9, wherein the step of forming the interconnecting member further comprises steps of: forming a barrier layer prior to the step of forming the conductive layer; and forming an antireflective coating after the step of forming the conductive layer.

Claim 14

The process of claim 11, wherein the step of forming the interconnecting member further comprises a step of forming a glue layer before the step of forming the barrier layer.

Claim 15

The process of claim 12, wherein: the glue layer includes titanium; the barrier layer includes titanium nitride; and the antireflective coating includes titanium nitride.

Claim 16

The process of claim 9, further comprising a step of annealing the interconnecting member after the step of forming the passivation layer.

Claim 17

The process of claim 9, wherein the conductive layer does not include copper.

Claim 18

A process for forming a semiconductor device comprising the steps of: forming a conductor, wherein the conductor is selected from a group consisting of a doped region lying within a semiconductor substrate, a gate electrode overlying the substrate, a silicon-containing electrode overlying the substrate, and a metal-containing member overlying the substrate; forming an insulating layer over the conductor and including an opening, wherein at least a portion of the conductor is exposed within the opening; forming a plug within the opening, wherein the plug is selected from a group consisting of a contact plug and a via plug; and forming an interconnecting member that includes a conductive layer that extends along all of the interconnecting member, wherein: a portion of the interconnecting member is formed over the insulating layer and another portion of the interconnecting member is formed overlying the plug; the interconnecting member includes a conductive layer that is an alloy that consists of aluminum, nickel, and chromium and has at least 99 weight percent aluminum, 0.1-0.5 weight percent nickel, and 0.02-0.1 weight percent chromium; and the interconnecting member is formed such that it is electrically connected to the conductor; and forming a passivation layer over the interconnecting member.

Claim 19

A process for forming a semiconductor device comprising the steps of: forming a conductor, wherein the conductor is selected from a group consisting of a doped region lying within a semiconductor substrate, a gate electrode overlying the substrate, a silicon-containing electrode overlying the substrate, and a metal-containing member overlying the substrate; forming an insulating layer over the conductor and including an opening, wherein at least a portion of the conductor is exposed within the opening; forming a plug within the opening, wherein the plug is selected from a group consisting of a contact plug and a via plug; and forming an interconnecting member that includes a conductive layer that extends along all of the interconnecting member, wherein: a portion of the interconnecting member is formed over the insulating layer and another portion of the interconnecting member is formed overlying the plug; the interconnecting member includes a conductive layer that is an alloy that consists of aluminum, nickel, and chromium and has at least 99 weight percent aluminum, 0.1-0.5 weight percent nickel, and 0.02-0.1 weight percent chromium; and the interconnecting member is formed such that it is electrically connected to the conductor; and forming a passivation layer over the interconnecting member.

Claim 20

The process of claim 16, wherein the step of forming the interconnecting member further comprises steps of: forming a glue layer prior to the step of forming the conductive layer; forming a barrier layer overlying the glue layer, wherein the step of forming the barrier layer is performed prior to the step of forming the conductive layer; and forming an antireflective coating after the step of forming the conductive layer.

Claim 21

The process of claim 16, wherein the glue layer includes titanium; the barrier layer includes titanium nitride; the antireflective coating includes titanium nitride; and the plug includes tungsten.

Claim 22

The process of claim 16, wherein the plug is a via plug.

Claim 23

The process of claim 16, further comprising a step of annealing the interconnecting member after the step of forming the passivation layer.