US5647946A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Structure and method including dry etching techniques for forming an array of thermal sensitive elements
Assignee: L3 Technologies Inc
•
Filing: 1995-06-05
•
Granted: 1997-07-15
•
Expires: 2015-06-05
Abstract
Abstract An array of thermal sensor elements (16) is formed from a pyroelectric substrate (46) having an infrared absorber and common electrode assembly (18) attached thereto. A first layer of metal contacts (60) is formed to define masked (61) and unmasked (68) regions of the substrate (46). A second layer of metal contacts (62) is formed on the first layer of contacts (60). A radiation etch mask layer (66) is formed to encapsulate the exposed portions of the second layer of contacts (62). A dry-etch mask layer (74) is formed to encapsulate the exposed portions of the first layer of contacts (60) and radiation etch mask layer (66). An initial portion of each unmasked region (68) is etched using a dry-etch process. The remaining portions of the unmasked regions (68) are exposed to an etchant (70) and irradiated with electromagnetic energy to substantially increase the reactivity between the remaining portions and the etchant (70). During such irradiation, the etchant (70) etches the remaining portions substantially faster than the first layer of contacts (60) and the radiation etch mask layer (66).
Inventors
- 👤 James F. Belcher
- 👤 Howard R. Beratan
- 👤 Scott R. Summerfelt
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-08 10:01
CPC Classifications
H; H10; H10N; H10N15/00; H10N15/10; G; G01; G01J; G01J5/00; G01J5/10; G01J5/34; Y; Y10; Y10S; Y10S438/00; Y10S438/942
Claims Analysis
Total Claims: 14
Claim 1
Independent Claim
161 words
A semiconductor structure comprising: a pyroelectric substrate having an infrared absorber and common electrode assembly attached to one side thereof; a first layer of electrically conductive contacts disposed on the other side of said substrate to define masked and unmasked regions thereof; a second layer of electrically conductive contacts disposed on said first layer of contacts; a radiation etch mask layer that encapsulates the exposed portions of said second layer of contacts; said radiation etch mask layer formed in part from spun-on silicon oxide; a dry-etch mask layer that encapsulates the exposed portions of said first layer of contacts and said radiation etch mask layer; wherein during dry etching of an initial portion of each of said unmasked regions, said dry-etch mask layer protects said radiation-mask layer; and wherein during irradiation of a remaining portion of each of said unmasked regions, an etchant etches said remaining portions substantially faster than said first layer of contacts and said radiation etch mask layer.
Claim 2
Dependent Claim
161 words
A semiconductor structure comprising: a pyroelectric substrate having an infrared absorber and common electrode assembly attached to one side thereof; a first layer of electrically conductive contacts disposed on the other side of said substrate to define masked and unmasked regions thereof; a second layer of electrically conductive contacts disposed on said first layer of contacts; a radiation etch mask layer that encapsulates the exposed portions of said second layer of contacts; said radiation etch mask layer formed in part from spun-on silicon oxide; a dry-etch mask layer that encapsulates the exposed portions of said first layer of contacts and said radiation etch mask layer; wherein during dry etching of an initial portion of each of said unmasked regions, said dry-etch mask layer protects said radiation-mask layer; and wherein during irradiation of a remaining portion of each of said unmasked regions, an etchant etches said remaining portions substantially faster than said first layer of contacts and said radiation etch mask layer.
Claim 3
Dependent Claim
34 words
The semiconductor structure of claim 1 further comprising: a bump bonding layer disposed on said second layer of contacts; and wherein said radiation etch mask layer encapsulates exposed portions of said bump bonding layer.
Claim 4
Dependent Claim
54 words
The structure of claim 1 further comprising: an etch stop disposed between said infrared absorber and common electrode assembly and said substrate in general alignment with said unmasked regions; and openings formed in said etch stop to expose portions of said infrared absorber and common electrode assembly to allow the formation of slots therein.
Claim 5
Dependent Claim
136 words
The structure of claim 1 wherein said dry-etch mask layer comprises: an ion-mill mask layer that encapsulates said radiation etch mask layer and has a pattern formed therein, said pattern for allowing substantially vertical walls to be formed around said unmasked regions during dry etching of said unmasked regions; a dry-etch-selective mask layer disposed on and comprising a different material than said ion-mill mask layer, and having said pattern formed therein, said dry-etch-selective mask layer for use as a first etch mask to allow etching of said pattern in said ion-mill mask layer; and a photosensitive layer disposed on and comprising a different material than said dry-etch-selective mask layer, and having said pattern formed therein, said photosensitive layer for use as a second mask layer to allow etching of said pattern in said dry-etch-selective mask layer.
Claim 6
Dependent Claim
75 words
The semiconductor structure of claim 1 further comprising: said dry-etch mask layer and said radiation etch mask layer comprising material selected from the group consisting of SiO 2 , Si 3 N 4 , Al 2 O 3 , B 2 O 3 , and Ta 2 O 5 ; and said radiation etch mask layer further comprising said spun-on silicon oxide doped with material selected from the group consisting of iron, palladium and manganese.
Claim 7
Dependent Claim
149 words
A semiconductor structure comprising: a pyroelectric substrate having an infrared absorber and common electrode assembly attached to one side thereof; a first layer of electrically conductive contacts disposed on the other side of said substrate to define masked and unmasked regions thereof; a second layer of electrically conductive contacts disposed on said first layer of contacts; a radiation etch mask layer that encapsulates the exposed portions of said second layer of contacts; a dry-etch mask layer that encapsulates the exposed portions of said first layer of contacts and said radiation etch mask layer; wherein during dry etching of an initial portion of each of said unmasked regions, said dry-etch mask layer protects said radiation-mask layer; and wherein during irradiation of a remaining portion of each of said unmasked regions, an etchant etches said remaining portions substantially faster than said first layer of contacts and said radiation etch mask layer.
Claim 8
Dependent Claim
149 words
A semiconductor structure comprising: a pyroelectric substrate having an infrared absorber and common electrode assembly attached to one side thereof; a first layer of electrically conductive contacts disposed on the other side of said substrate to define masked and unmasked regions thereof; a second layer of electrically conductive contacts disposed on said first layer of contacts; a radiation etch mask layer that encapsulates the exposed portions of said second layer of contacts; a dry-etch mask layer that encapsulates the exposed portions of said first layer of contacts and said radiation etch mask layer; wherein during dry etching of an initial portion of each of said unmasked regions, said dry-etch mask layer protects said radiation-mask layer; and wherein during irradiation of a remaining portion of each of said unmasked regions, an etchant etches said remaining portions substantially faster than said first layer of contacts and said radiation etch mask layer.
Claim 9
Dependent Claim
34 words
The semiconductor structure of claim 6 further comprising: a bump bonding layer disposed on said second layer of contacts; and wherein said radiation etch mask layer encapsulates exposed portions of said bump bonding layer.
Claim 10
Dependent Claim
54 words
The structure of claim 6 further comprising: an etch stop disposed between said infrared absorber and common electrode assembly and said substrate in general alignment with said unmasked regions; and openings formed in said etch stop to expose portions of said infrared absorber and common electrode assembly to allow the formation of slots therein.
Claim 11
Dependent Claim
136 words
The structure of claim 6 wherein said dry-etch mask layer comprises: an ion-mill mask layer that encapsulates said radiation etch mask layer and has a pattern formed therein, said pattern for allowing substantially vertical walls to be formed around said unmasked regions during dry etching of said unmasked regions; a dry-etch-selective mask layer disposed on and comprising a different material than said ion-mill mask layer, and having said pattern formed therein, said dry-etch-selective mask layer for use as a first etch mask to allow etching of said pattern in said ion-mill mask layer; and a photosensitive layer disposed on and comprising a different material than said dry-etch-selective mask layer, and having said pattern formed therein, said photosensitive layer for use as a second mask layer to allow etching of said pattern in said dry-etch-selective mask layer.
Claim 12
Dependent Claim
21 words
The semiconductor structure of claim 6 wherein said radiation etch mask layer comprises spun-on silicon oxide doped with selected transition metals.
Claim 13
Dependent Claim
49 words
The semiconductor structure of claim 6 wherein said dry-etch mask layer and said radiation etch mask layer comprise material selected from the group consisting of SiO 2 , Si 3 N 4 , Al 2 O 3 , B 2 O 3 , and Ta 2 O 5 .
Claim 14
Dependent Claim
29 words
The semiconductor structure of claim 6 wherein said radiation etch mask layer comprises spun-on silicon oxide doped with material selected from the group consisting of iron, palladium and manganese.
References Cited (Backward Citations)
DE2111746A1
Cited
US3846820A
Cited
US4018608A
Cited
US4080532A
Cited
DE2752704A1
Cited
US4379232A
Cited
US4143269A
Cited
US4162402A
Cited
US4142207A
Cited
US4275302A
Cited
US4594507A
Cited
US4663529A
Cited
US4750979A
Cited
US4751387A
Cited
US4705361A
Cited
US5039620A
Cited
US4980338A
Cited
US4949783A
Cited
US5010251A
Cited
US5021663A
Cited
US5021663B1
Cited
US5051591A
Cited
US5047644A
Cited
US5264326A
Cited
US4994672A
Cited
GB2251952A
Cited
WO1991016607A1
Cited
US5242537A
Cited
US5196703A
Cited
US5367167A
Cited
US5238529A
Cited
US5238530A
Cited
US5201989A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2000-07-14 | 2001-01-13 | 2001-07-15 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2004-07-14 | 2005-01-13 | 2005-07-15 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2008-07-14 | 2009-01-13 | 2009-07-15 | $7700.00 | Window Closed / Lapsed |