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US5629237A Expired / Lapsed US ⏱️ 0.0 years remaining

Taper etching without re-entrance profile

Assignee: Taiwan Semiconductor Manufacturing Co TSMC Ltd
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Filing: 1995-10-19
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Granted: 1997-05-13
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Expires: 2015-10-19
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Abstract

Abstract A method is described for forming tapered contact via holes in large scale integrated circuit structures which avoids the formation of a re-entrance profile. The re-entrance profile can form at the entrance to the contact via hole when a dry etch is used as a first etching step by redepositing material removed during the dry etch at the entrance of the contact via hole. This re-entrance profile makes the angle of entrance into the contact via hole greater than 90° and the step coverage of metal filling the hole poor. This invention uses wet etching with a greater lateral etch rate than vertical etch rate as a first etching step in the formation of the contact via hole and avoids the formation of the re-entrance profile. The edges of the resulting contact via hole are smooth and the entrance angle into the contact via hole is substantially less than 90°. The step coverage of metal later filling the contact via hole is substantially improved.

Inventors

  • 👤 Pei-Jan Wang
  • 👤 Kuei-Lung Chou
  • 👤 Jiunn-Jyi Lin
  • 👤 Hsien-Wen Chang

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-09 05:14
CPC Classifications
H; H10; H10W; H10W20/00; H10W20/01; H10W20/071; H10W20/081; H10W20/082; Y; Y10; Y10S; Y10S438/00; Y10S438/978

Claims Analysis

Total Claims: 18
Claim 1
Independent Claim 190 words
A method of forming tapered contact via holes, comprising the steps of: providing an integrated circuit structure having device elements within a semiconductor substrate, contact areas in said semiconductor substrate, and an insulating layer over said semiconductor substrate; forming a photoresist masking layer over said insulating layer; forming openings in said photoresist masking layer directly over said contact areas; wet etching into said insulating layer through a first thickness, thereby forming a first via hole opening, using said photoresist masking layer as a mask; vertically anisotropically etching, by means of a first dry anisotropic etch, into said insulating layer through a second thickness, thereby forming a second via hole opening, using said photoresist masking layer as a mask; isotropically etching, by means of a dry isotropic etch, into said insulating layer through a third thickness, thereby forming a third via hole opening, using said photoresist masking layer as a mask; vertically anisotropically etching, by means of a second dry anisotropic etch, through the remainder of said insulating layer, thereby forming said tapered contact via hole opening, using said photoresist masking layer as a mask; and removing said photoresist masking layer.
Claim 2
Independent Claim 190 words
A method of forming tapered contact via holes, comprising the steps of: providing an integrated circuit structure having device elements within a semiconductor substrate, contact areas in said semiconductor substrate, and an insulating layer over said semiconductor substrate; forming a photoresist masking layer over said insulating layer; forming openings in said photoresist masking layer directly over said contact areas; wet etching into said insulating layer through a first thickness, thereby forming a first via hole opening, using said photoresist masking layer as a mask; vertically anisotropically etching, by means of a first dry anisotropic etch, into said insulating layer through a second thickness, thereby forming a second via hole opening, using said photoresist masking layer as a mask; isotropically etching, by means of a dry isotropic etch, into said insulating layer through a third thickness, thereby forming a third via hole opening, using said photoresist masking layer as a mask; vertically anisotropically etching, by means of a second dry anisotropic etch, through the remainder of said insulating layer, thereby forming said tapered contact via hole opening, using said photoresist masking layer as a mask; and removing said photoresist masking layer.
Claim 3
Dependent Claim 22 words
The method of claim 1 wherein said insulating layer is borophosphosilicate glass with a thickness of between about 7500 and 9000 Angstroms.
Claim 4
Dependent Claim 25 words
The method of claim 1 wherein said opening in said photoresist masking layer is circular with a diameter of between about 0.7 and 1.0 microns.
Claim 5
Dependent Claim 18 words
The method of claim 1 wherein said first dry anisotropic etch is accomplished by means of ion bombardment.
Claim 6
Dependent Claim 17 words
The method of claim 1 wherein said dry isotropic etch is accomplished by means of plasma etching.
Claim 7
Dependent Claim 18 words
The method of claim 1 wherein said second dry anisotropic etch is accomplished by means of ion bombardment.
Claim 8
Dependent Claim 16 words
The method of claim 1 wherein said first thickness is between about 500 and 1000 Angstroms.
Claim 9
Dependent Claim 16 words
The method of claim 1 wherein said second thickness is between about 2500 and 3000 Angstroms.
Claim 10
Dependent Claim 16 words
The method of claim 1 wherein said third thickness is between about 1000 and 1500 Angstroms.
Claim 11
Dependent Claim 22 words
The method of claim 1 wherein said insulating layer is silicon dioxide with a thickness of between about 7500 and 9000 Angstroms.
Claim 12
Dependent Claim 21 words
The method of claim 1 wherein said insulating layer is glass with a thickness of between about 7500 and 9000 Angstroms.
Claim 13
Independent Claim 175 words
A method of forming tapered contact via holes, comprising the steps of: providing an integrated circuit structure having device elements within a semiconductor substrate, contact areas in said semiconductor substrate, and a layer of borophosphosilicate glass having a thickness of between about 5000 and 9000 Angstroms over said semiconductor substrate; forming a photoresist masking layer over said layer of borophosphosilicate glass; forming openings in said photoresist masking layer directly over said contact areas; wet etching into said layer of borophosphosilicate glass through a first thickness, thereby forming a first via hole opening, using said photoresist masking layer as a mask; isotropically etching, by means of a dry isotropic etch, into said layer of borophosphosilicate glass through a second thickness, thereby forming a second via hole opening, using said photoresist masking layer as a mask; vertically anisotropically etching, by means of a dry anisotropic etch, through the remainder of said layer of borophosphosilicate glass, thereby forming said tapered contact via hole opening, using said photoresist masking layer as a mask; and removing said photoresist masking layer.
Claim 14
Independent Claim 175 words
A method of forming tapered contact via holes, comprising the steps of: providing an integrated circuit structure having device elements within a semiconductor substrate, contact areas in said semiconductor substrate, and a layer of borophosphosilicate glass having a thickness of between about 5000 and 9000 Angstroms over said semiconductor substrate; forming a photoresist masking layer over said layer of borophosphosilicate glass; forming openings in said photoresist masking layer directly over said contact areas; wet etching into said layer of borophosphosilicate glass through a first thickness, thereby forming a first via hole opening, using said photoresist masking layer as a mask; isotropically etching, by means of a dry isotropic etch, into said layer of borophosphosilicate glass through a second thickness, thereby forming a second via hole opening, using said photoresist masking layer as a mask; vertically anisotropically etching, by means of a dry anisotropic etch, through the remainder of said layer of borophosphosilicate glass, thereby forming said tapered contact via hole opening, using said photoresist masking layer as a mask; and removing said photoresist masking layer.
Claim 15
Independent Claim 175 words
A method of forming tapered contact via holes, comprising the steps of: providing an integrated circuit structure having device elements within a semiconductor substrate, contact areas in said semiconductor substrate, and a layer of silicon dioxide having a thickness of between about 7500 and 9000 Angstroms over said semiconductor substrate; forming a photoresist masking layer over said layer of silicon dioxide; forming openings in said photoresist masking layer directly over said contact areas; wet etching into said layer of silicon dioxide through a first thickness, thereby forming a first via hole opening, using said photoresist masking layer as a mask; isotropically etching, by means of a dry isotropic etch, into said layer of silicon dioxide through a second thickness, thereby forming a second via hole opening, using said photoresist masking layer as a mask; vertically anisotropically etching, by means of a dry anisotropic etch, through the remainder of said layer of silicon dioxide, thereby forming said tapered contact via hole opening, using said photoresist masking layer as a mask; and removing said photoresist masking layer.
Claim 16
Independent Claim 175 words
A method of forming tapered contact via holes, comprising the steps of: providing an integrated circuit structure having device elements within a semiconductor substrate, contact areas in said semiconductor substrate, and a layer of silicon dioxide having a thickness of between about 7500 and 9000 Angstroms over said semiconductor substrate; forming a photoresist masking layer over said layer of silicon dioxide; forming openings in said photoresist masking layer directly over said contact areas; wet etching into said layer of silicon dioxide through a first thickness, thereby forming a first via hole opening, using said photoresist masking layer as a mask; isotropically etching, by means of a dry isotropic etch, into said layer of silicon dioxide through a second thickness, thereby forming a second via hole opening, using said photoresist masking layer as a mask; vertically anisotropically etching, by means of a dry anisotropic etch, through the remainder of said layer of silicon dioxide, thereby forming said tapered contact via hole opening, using said photoresist masking layer as a mask; and removing said photoresist masking layer.
Claim 17
Independent Claim 170 words
A method of forming tapered contact via holes, comprising the steps of: providing an integrated circuit structure having device elements within a semiconductor substrate, contact areas in said semiconductor substrate, and a layer of glass having a thickness of between about 7500 and 9000 Angstroms over said semiconductor substrate; forming a photoresist masking layer over said layer of glass; forming openings in said photoresist masking layer directly over said contact areas; wet etching into said layer of glass through a first thickness, thereby forming a first via hole opening, using said photoresist masking layer as a mask; isotropically etching, by means of a dry isotropic etch, into said layer of glass through a second thickness, thereby forming a second via hole opening, using said photoresist masking layer as a mask; vertically anisotropically etching, by means of a dry anisotropic etch, through the remainder of said layer of glass, thereby forming said tapered contact via hole opening, using said photoresist masking layer as a mask; and removing said photoresist masking layer.
Claim 18
Independent Claim 170 words
A method of forming tapered contact via holes, comprising the steps of: providing an integrated circuit structure having device elements within a semiconductor substrate, contact areas in said semiconductor substrate, and a layer of glass having a thickness of between about 7500 and 9000 Angstroms over said semiconductor substrate; forming a photoresist masking layer over said layer of glass; forming openings in said photoresist masking layer directly over said contact areas; wet etching into said layer of glass through a first thickness, thereby forming a first via hole opening, using said photoresist masking layer as a mask; isotropically etching, by means of a dry isotropic etch, into said layer of glass through a second thickness, thereby forming a second via hole opening, using said photoresist masking layer as a mask; vertically anisotropically etching, by means of a dry anisotropic etch, through the remainder of said layer of glass, thereby forming said tapered contact via hole opening, using said photoresist masking layer as a mask; and removing said photoresist masking layer.

References Cited (Backward Citations)

US4352725A Cited
US4372034A Cited
US4372034B1 Cited
JPH01286442A Cited
JPH022125A Cited
JPH02244720A Cited
US4902377A Cited
US5219791A Cited
US5203957A Cited
US5164340A Cited
US5180689A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 2000-05-12 2000-11-11 2001-05-13 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2004-05-12 2004-11-11 2005-05-13 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2008-05-12 2008-11-11 2009-05-13 $7700.00 Window Closed / Lapsed

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