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US5619052A Expired / Lapsed US ⏱️ 0.0 years remaining

Interpoly dielectric structure in EEPROM device

Assignee: Macronix International Co Ltd
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Filing: 1994-09-29
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Granted: 1997-04-08
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Expires: 2014-09-29
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Abstract

Abstract A dielectric insulating composite for insulating a floating gate from a control gate in a nonvolatile memory cell such as EPROM, EEPROM and flash EPROM cells is provided which includes a bottom layer of silicon dioxide formed on the floating gate, a layer of silicon nitride formed on the bottom silicon dioxide layer and a top silicon dioxide layer formed on the nitride layer where the silicon nitride layer has a thickness in the resulting composite which is less than the bottom and top silicon dioxide layers. In one embodiment, the nonvolatile memory cell includes a first conductivity-type semiconductor substrate, source and drain regions formed on a surface of the substrate, an insulating layer thermally grown on top of the source and drain regions, a floating gate positioned on the insulating layer for insulating the floating gate from the source and drain regions, the dielectric insulating composite being positioned between the floating gate and a control gate.

Inventors

  • 👤 Chang Y. Chang
  • 👤 Fuchia Shone
  • 👤 Chin-Yi Huang
  • 👤 Nai C. Peng

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-30 06:45
CPC Classifications
H; H10; H10D; H10D64/00; H10D64/60; H10D64/66; H10D64/68; H10D64/693; H10D64/01; H10D64/031; H10D64/035; H10D64/681

Claims Analysis

Total Claims: 26
Claim 1
Independent Claim 90 words
A dielectric insulating composite for insulating a floating gate from a control gate in a nonvolatile memory cell, the dielectric insulating composite comprising: a bottom layer of silicon dioxide formed on said floating gate; a layer of silicon nitride formed on said bottom silicon dioxide layer, said silicon nitride layer having a thickness which is less than said bottom silicon dioxide layer; and a top layer of silicon dioxide formed on said nitride layer, said top silicon dioxide layer having a thickness which is greater than said silicon nitride layer.
Claim 2
Dependent Claim 90 words
A dielectric insulating composite for insulating a floating gate from a control gate in a nonvolatile memory cell, the dielectric insulating composite comprising: a bottom layer of silicon dioxide formed on said floating gate; a layer of silicon nitride formed on said bottom silicon dioxide layer, said silicon nitride layer having a thickness which is less than said bottom silicon dioxide layer; and a top layer of silicon dioxide formed on said nitride layer, said top silicon dioxide layer having a thickness which is greater than said silicon nitride layer.
Claim 3
Dependent Claim 25 words
A dielectric insulating composite according to claim 1 wherein said silicon nitride layer contains pinholes plugged with oxygen to prevent charge leakage through said pinholes.
Claim 4
Dependent Claim 42 words
A dielectric insulating composite according to claim 1 wherein said bottom silicon dioxide layer has a thickness equal to or less than about 100 Å and said top silicon dioxide layer has a thickness equal to or less than about 100 Å.
Claim 5
Dependent Claim 24 words
A dielectric insulating composite according to claim 3 wherein said bottom and top silicon dioxide layers are formed by high temperature chemical vapor deposition.
Claim 6
Dependent Claim 21 words
A dielectric insulating composite according to claim 3 wherein said silicon nitride layer has a thickness less than about 80 Å.
Claim 7
Dependent Claim 50 words
A dielectric insulating composite according to claim 3 wherein said bottom silicon dioxide layer has a thickness between about 25 and 100 Å, said silicon nitride layer having a thickness less than about 80 Å and said top silicon dioxide layer having a thickness between about 40 and 100 Å.
Claim 8
Dependent Claim 29 words
A dielectric insulating composite according to claim 6 wherein the capacitively measured effective oxide thickness of said dielectric insulating composite is equal to or less than about 180 Å.
Claim 9
Dependent Claim 24 words
A dielectric insulating composite according to claim 6 wherein said bottom and top silicon dioxide layers are formed by high temperature chemical vapor deposition.
Claim 10
Dependent Claim 25 words
A dielectric insulating composite according to claim 6 wherein said silicon nitride layer contains pinholes plugged with oxygen to prevent charge leakage through said pinholes.
Claim 11
Dependent Claim 133 words
A nonvolatile memory cell comprising: a) a first conductivity-type semiconductor substrate; b) source and drain regions formed on a surface of said substrate; c) an insulating layer formed on said source and drain regions; d) a floating gate positioned on said insulating layer; e) a dielectric composite positioned on said floating gate, said dielectric composite including a bottom layer of silicon dioxide formed on said floating gate; a layer of silicon nitride formed on said bottom silicon dioxide layer, said silicon nitride layer having a thickness which is less than said bottom silicon dioxide layer; and a top layer of silicon dioxide formed on said nitride layer, said top silicon dioxide layer having a thickness which is greater than said silicon nitride layer; and f) a control gate positioned on said dielectric composite.
Claim 12
Dependent Claim 133 words
A nonvolatile memory cell comprising: a) a first conductivity-type semiconductor substrate; b) source and drain regions formed on a surface of said substrate; c) an insulating layer formed on said source and drain regions; d) a floating gate positioned on said insulating layer; e) a dielectric composite positioned on said floating gate, said dielectric composite including a bottom layer of silicon dioxide formed on said floating gate; a layer of silicon nitride formed on said bottom silicon dioxide layer, said silicon nitride layer having a thickness which is less than said bottom silicon dioxide layer; and a top layer of silicon dioxide formed on said nitride layer, said top silicon dioxide layer having a thickness which is greater than said silicon nitride layer; and f) a control gate positioned on said dielectric composite.
Claim 13
Dependent Claim 25 words
A nonvolatile memory cell according to claim 10 wherein said silicon nitride layer contains pinholes plugged with oxygen to prevent charge leakage through said pinholes.
Claim 14
Dependent Claim 42 words
A nonvolatile memory cell according to claim 10 wherein said bottom silicon dioxide layer has a thickness equal to or less than about 100 Å and said top silicon dioxide layer has a thickness equal to or less than about 100 Å.
Claim 15
Dependent Claim 29 words
A nonvolatile memory cell according to claim 10 wherein the capacitively measured effective oxide thickness of said dielectric insulating composite is equal to or less than about 180 Å.
Claim 16
Dependent Claim 24 words
A nonvolatile memory cell according to claim 12 wherein said bottom and top silicon dioxide layers are formed by high temperature chemical vapor deposition.
Claim 17
Dependent Claim 21 words
A nonvolatile memory cell according to claim 10 wherein said silicon nitride layer has a thickness less than about 80 Å.
Claim 18
Dependent Claim 50 words
A nonvolatile memory cell according to claim 10 wherein said bottom silicon dioxide layer has a thickness between about 25 and 100 Å, said silicon nitride layer having a thickness less than about 80 Å and said top silicon dioxide layer having a thickness between about 40 and 100 Å.
Claim 19
Dependent Claim 29 words
A nonvolatile memory cell according to claim 16 wherein the capacitively measured effective oxide thickness of said dielectric insulating composite is equal to or less than about 180 Å.
Claim 20
Dependent Claim 24 words
A nonvolatile memory cell according to claim 16 wherein said bottom and top silicon dioxide layers are formed by high temperature chemical vapor deposition.
Claim 21
Dependent Claim 25 words
A nonvolatile memory cell according to claim 16 wherein said silicon nitride layer contains pinholes plugged with oxygen to prevent charge leakage through said pinholes.
Claim 22
Dependent Claim 21 words
A nonvolatile memory cell according to claim 10, said cell further comprising a layer of tungsten positioned on said control gate.
Claim 23
Dependent Claim 105 words
A dielectric insulator for insulating a floating gate from a control gate in a nonvolatile memory cell, the dielectric insulator comprising: a bottom silicon dioxide layer formed on said floating gate, a layer of silicon nitride formed on said bottom silicon dioxide layer, said silicon nitride layer having a thickness which is less than said bottom silicon dioxide layer; and a top layer of silicon dioxide formed on said nitride layer, said top silicon dioxide layer having a thickness which is greater than said silicon nitride layer, the dielectric insulator having a capacitively measured effective oxide thickness equal to or less than about 180 Å.
Claim 24
Dependent Claim 105 words
A dielectric insulator for insulating a floating gate from a control gate in a nonvolatile memory cell, the dielectric insulator comprising: a bottom silicon dioxide layer formed on said floating gate, a layer of silicon nitride formed on said bottom silicon dioxide layer, said silicon nitride layer having a thickness which is less than said bottom silicon dioxide layer; and a top layer of silicon dioxide formed on said nitride layer, said top silicon dioxide layer having a thickness which is greater than said silicon nitride layer, the dielectric insulator having a capacitively measured effective oxide thickness equal to or less than about 180 Å.
Claim 25
Dependent Claim 56 words
A dielectric insulator according to claim 21 wherein said silicon dioxide layer includes a bottom layer of silicon dioxide having pinholes and a separate top layer of silicon dioxide having pinholes formed on said bottom layer of silicon dioxide such that pinholes in said bottom layer are not in alignment with pinholes in said top layer.
Claim 26
Dependent Claim 23 words
A dielectric insulator according to claim 22 wherein said bottom and top silicon dioxide layers are formed by high temperature chemical vapor deposition.

References Cited (Backward Citations)

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USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 2000-04-07 2000-10-07 2001-04-08 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2004-04-07 2004-10-07 2005-04-08 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2008-04-07 2008-10-07 2009-04-08 $7700.00 Window Closed / Lapsed

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