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Patent US5607874A successfully refreshed from Google Patents.
US5607874A
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Method for fabricating a DRAM cell with a T shaped storage capacitor
Assignee: Taiwan Semiconductor Manufacturing Co TSMC Ltd
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Filing: 1996-02-02
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Granted: 1997-03-04
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Expires: 2016-02-02
Abstract
Abstract Two embodiments of a method are described for fabricating a DRAM cell having a T or Y shaped capacitor connected to a MOS transistor with source and drain regions. In a first embodiment, the method comprises using two masks to form a cylindrical hole partial through the insulating layer and a concentric contact hole over the source. A first conductive layer is formed over the first insulating layer, at least completely filling the trench and filling the contact hole. In a key step, the first polysilicon layer is chemically mechanically polished thereby forming a T shaped storage electrode. Next, a capacitor dielectric layer and a top electrode are sequentially formed over at least the T shaped storage electrode. The second embodiment form the contact hole and trench as described above. A conformal first conductive layer is formed over the first insulating layer, filling the contact hole and covering the sidewalls and bottom of the trench, but not filling the trench. A dielectric layer is formed over the first conductive layer at least fills the trench. The dielectric layer and the first conductive layer are chemically mechanically polished forming the Y shaped electrode. Next, a capacitor dielectric layer and a top electrode are formed over the Y shaped storage electrode.
Inventors
- 👤 Chen-Jong Wang
- 👤 Mong-Song Liang
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-30 06:42
CPC Classifications
H; H10; H10B; H10B12/00; H10B12/01; H10B12/02; H10B12/03; H10B12/033; H10B12/30; H10B12/31; H10B12/318
Claims Analysis
Total Claims: 9
Claim 1
Independent Claim
193 words
A method of fabricating a capacitor having a T shaped storage electrode for a memory device on a substrate; said substrate having a device area with a source region formed therein, comprising the steps of: a) forming an etch barrier layer over at least said device area and elsewhere over said substrate; b) forming a first insulating layer over said barrier layer; c) patterning the first insulating layer forming a contact hole to at least partially expose said source region; d) forming a trench in said first insulating layer centered around said contact hole; said trench having vertical sidewalls and a horizontal bottom; e) forming a first conductive layer composed of polysilicon over the first insulating layer, at least completely filling said trench and filling said contact hole thereby forming an electrical contact with said source; f) chemical-mechanical polishing said first polysilicon layer to a depth that at least exposes said first insulation layer thereby forming a T shaped storage electrode; removing said first insulating layer; and h) sequentially forming a capacitor dielectric layer and a top electrode over said at least said T shaped storage electrode thereby forming a T shaped capacitor.
Claim 2
Independent Claim
193 words
A method of fabricating a capacitor having a T shaped storage electrode for a memory device on a substrate; said substrate having a device area with a source region formed therein, comprising the steps of: a) forming an etch barrier layer over at least said device area and elsewhere over said substrate; b) forming a first insulating layer over said barrier layer; c) patterning the first insulating layer forming a contact hole to at least partially expose said source region; d) forming a trench in said first insulating layer centered around said contact hole; said trench having vertical sidewalls and a horizontal bottom; e) forming a first conductive layer composed of polysilicon over the first insulating layer, at least completely filling said trench and filling said contact hole thereby forming an electrical contact with said source; f) chemical-mechanical polishing said first polysilicon layer to a depth that at least exposes said first insulation layer thereby forming a T shaped storage electrode; removing said first insulating layer; and h) sequentially forming a capacitor dielectric layer and a top electrode over said at least said T shaped storage electrode thereby forming a T shaped capacitor.
Claim 3
Dependent Claim
23 words
The method of claim 1 said substrate further includes a first conformal layer composed of silicon oxide at least over said device area.
Claim 4
Dependent Claim
52 words
The method of claim 2 wherein said first conformal layer is composed of silicon oxide and has a thickness in the range of between about 500 and 3000 Å and said etch barrier layer is composed of silicon nitride having a thickness in the range of between about 500 and 3000 Å.
Claim 5
Dependent Claim
39 words
The method of claim 1 wherein said first insulating layer is composed of a material selected from the group consisting of: BPSG, and silicon oxide; and has a thickness in the range of between about 5000 and 15,000 Å.
Claim 6
Dependent Claim
56 words
The method of claim 1 wherein forming said trench comprises: forming a first photoresist layer having an first opening over said source region which defines the area for the formation of said T shaped storage electrode and anisotropically etching said first insulating layer through said first opening removing an upper portion of said first insulating layer.
Claim 7
Dependent Claim
46 words
The method of claim 1 wherein said trench has a depth in the range of between about 2000 and 6000 Å; and width in the range of between about 0.4 and 0.8 μm; and a length in the range of between about 0.8 and 1.2 μm.
Claim 8
Dependent Claim
59 words
The method of claim 1 wherein said first conductive layer is polysilicon doped with an impurity selected from the group consisting of: phosphorus and arsenic and has an impurity concentration in the range of between about 1E19 and 1E21 atoms/cm 3 and a thickness over said first insulating layer in the range of between about 3000 to 5000 Å.
Claim 9
Dependent Claim
60 words
The method of claim 1 wherein said capacitor dielectric layer is composed of a material selected from the group consisting of: a three layer structure of silicon oxide/silicon nitride/silicon oxide (ONO), a two layer structure of silicon oxide/silicon nitride (ON), and silicon nitride; said capacitor dielectric layer has a thickness in the range of between about 40 and 150 Å.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2000-03-03 | 2000-09-02 | 2001-03-04 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2004-03-03 | 2004-09-02 | 2005-03-04 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2008-03-03 | 2008-09-02 | 2009-03-04 | $7700.00 | Window Closed / Lapsed |