US5607818A
Expired / Lapsed
US
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Method for making interconnects and semiconductor structures using electrophoretic photoresist deposition
Assignee: Micron Technology Inc
•
Filing: 1995-05-30
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Granted: 1997-03-04
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Expires: 2015-05-30
Abstract
Abstract A method for electrophoretically depositing a layer of photoresist on a non-planar silicon structure and a method for forming a non-planar silicon structure using electrophoretic deposition are provided. The method comprises forming a silicon substrate with a non-planar topography and forming a conductive layer on the substrate. The substrate is then submerged in an electrolytic bath containing a photoresist solution comprising a polymer and a charged carrier group. At the same time the conductive layer is connected to a voltage source and to a non-sacrificial electrode and electrically biased. The biased conductive layer attracts the carrier group and causes a layer of photoresist to uniformly deposit on the conductive layer. The layer of photoresist can then be exposed and developed to form a photomask for etching the conductive layer. In an illustrative embodiment the silicon structure is an interconnect for testing unpackaged semiconductor dice. In another embodiment the silicon structure is a semiconductor structure having a dielectric layer formed on a non-planar topography and metal conductive lines formed on the dielectric layer.
Inventors
- 👤 Salman Akram
- 👤 Warren Farnworth
- 👤 David R. Hembree
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-02 15:48
CPC Classifications
G; G01; G01R; G01R1/00; G01R1/02; G01R1/04; G01R1/0408; G01R1/0433; G01R1/0441; G01R1/0466; G01R1/0483; H; H05; H05K; H05K3/00; H05K3/40; H05K3/4007; H10; H10P; H10P72/00; H10P72/70; H10P72/74; H10P74/00; H10P74/23; H10W; H10W70/00; H10W70/60; H10W70/62; H10W70/65; H10W70/67; H10W70/68; H10W90/00; H10W90/701; H10W99/00; G01R1/06; G01R1/067; G01R1/073; G01R1/07307; G01R1/0735; G01R3/00; G01R31/00; G01R31/28; G01R31/282; G01R31/2831; G01R31/2851; G01R31/2855; G01R31/286; G01R31/2863; H05K2201/00; H05K2201/01; H05K2201/0104; H05K2201/0133; H05K2201/03; H05K2201/0332; H05K2201/0335; H05K2201/0347; H05K2201/0364; H05K2201/0367; H05K2201/0388; H05K2201/0394; H05K2201/09; H05K2201/09209; H05K2201/09372; H05K2201/09481; H05K2201/095; H05K2201/09563; H05K2203/00; H05K2203/03; H05K2203/0307; H05K2203/07; H05K2203/0703; H05K2203/0723; H05K3/0058; H05K3/0067; H05K3/42; H05K3/423; H10W70/654; H10W70/655; H10W70/681; H10W72/00; H10W72/071; H10W72/075; H10W72/07531; H10W72/07532; H10W72/07533; H10W72/50; H10W72/551; H10W72/552; H10W72/5522; H10W72/5524; H10W90/20; H10W90/24; H10W90/721; H10W90/722; H10W90/751; H10W90/756
Claims Analysis
Total Claims: 46
Claim 1
Independent Claim
78 words
A method for fabricating an interconnect for a semiconductor die, said method comprising: providing a silicon substrate; forming a raised projection on the substrate comprising sidewalls and a tip portion; depositing an electrically conductive layer on the substrate and on the sidewall and tip portion of the raised projection; electrophoretically depositing a layer of photoresist on the conductive layer; exposing and developing the layer of photoresist to form a mask; and patterning the conductive layer using the mask.
Claim 2
Independent Claim
78 words
A method for fabricating an interconnect for a semiconductor die, said method comprising: providing a silicon substrate; forming a raised projection on the substrate comprising sidewalls and a tip portion; depositing an electrically conductive layer on the substrate and on the sidewall and tip portion of the raised projection; electrophoretically depositing a layer of photoresist on the conductive layer; exposing and developing the layer of photoresist to form a mask; and patterning the conductive layer using the mask.
Claim 3
Dependent Claim
20 words
The method as claimed in claim 1 and further comprising forming an insulating layer between the substrate and conductive layer.
Claim 4
Dependent Claim
24 words
The method as claimed in claim 1 and wherein the raised projection is formed with a height of from 1 μm to 100 μm.
Claim 5
Dependent Claim
22 words
The method as claimed in claim 1 and further comprising wetting the raised projection with photoresist prior to the electrophoretic deposition step.
Claim 6
Dependent Claim
28 words
The method as claimed in claim 1 and further comprising electrophoretically depositing the layer of photoresist with a substantially uniform current density across a surface of the substrate.
Claim 7
Dependent Claim
34 words
The method as claimed in claim 1 and wherein the electrically conductive layer comprises a material selected from the group consisting of aluminum, copper, titanium, tungsten, tantalum, platinum, molybdenum, cobalt, nickel, gold and iridium.
Claim 8
Dependent Claim
24 words
The method as claimed in claim 1 and wherein the electrically conductive layer is formed as a bi-metal stack including a non-oxidizing outer layer.
Claim 9
Dependent Claim
21 words
The method as claimed in claim 1 and wherein the layer of photoresist is electrophoretically deposited to a self limiting thickness.
Claim 10
Dependent Claim
27 words
The method as claimed in claim 1 and wherein the layer of photoresist is electrophoretically deposited to a thickness of about 5000 Å to about 15 μm.
Claim 11
Independent Claim
114 words
A method for fabricating a silicon structure comprising: forming a silicon substrate having a raised projection comprising sidewalls and a tip portion; conformably depositing a conductive layer on the substrate and on the sidewalls and tip portion of the raised projection; submerging the silicon substrate in a solution of photoresist formed with a charged carrier group; electrically connecting the conductive layer to a voltage source and to an electrode located within the photoresist solution; applying a voltage to the electrode and to the electrically conductive layer to electrophoretically deposit a layer of photoresist upon the conductive layer; and exposing and developing the layer of photoresist to form a mask for patterning the conductive layer.
Claim 12
Independent Claim
114 words
A method for fabricating a silicon structure comprising: forming a silicon substrate having a raised projection comprising sidewalls and a tip portion; conformably depositing a conductive layer on the substrate and on the sidewalls and tip portion of the raised projection; submerging the silicon substrate in a solution of photoresist formed with a charged carrier group; electrically connecting the conductive layer to a voltage source and to an electrode located within the photoresist solution; applying a voltage to the electrode and to the electrically conductive layer to electrophoretically deposit a layer of photoresist upon the conductive layer; and exposing and developing the layer of photoresist to form a mask for patterning the conductive layer.
Claim 13
Dependent Claim
27 words
The method as claimed in claim 10 and wherein a surface area of the electrode is equal to or greater than a surface area of the substrate.
Claim 14
Dependent Claim
22 words
The method as claimed in claim 10 and further comprising wetting the substrate with the photoresist solution prior to the submerging step.
Claim 15
Dependent Claim
24 words
The method as claimed in claim 10 and wherein the voltage during the applying step is from about 50 volts to about 500 volts.
Claim 16
Dependent Claim
28 words
The method as claimed in claim 10 and wherein the voltage is applied during the applying step for a duration of about 0.1 seconds to about 60 seconds.
Claim 17
Dependent Claim
28 words
The method as claimed in claim 10 and wherein a temperature of the photoresist solution during the submerging step is from about 15° C. to about 40° C.
Claim 18
Dependent Claim
31 words
The method as claimed in claim 10 and wherein a distance between the electrode and the silicon substrate during the applying step is from about 0.3 inches to about 5 inches.
Claim 19
Dependent Claim
16 words
The method as claimed in claim 10 and wherein the carrier group comprises an unsaturated monomer.
Claim 20
Dependent Claim
19 words
The method as claimed in claim 10 and further comprising: etching the conductive layer using the layer of photoresist.
Claim 21
Dependent Claim
28 words
The method as claimed in claim 10 and further comprising: exposing the electrophoretically deposited layer of photoresist by exposure to radiant energy which is passed through a reticle.
Claim 22
Dependent Claim
20 words
The method as claimed in claim 19 and further comprising: developing the exposed layer of photoresist with a developing solution.
Claim 23
Dependent Claim
18 words
The method as claimed in claim 10 and wherein the structure comprises an interconnect for a semiconductor die.
Claim 24
Independent Claim
54 words
A method for making a semiconductor structure comprising: forming a silicon substrate with a non-planar topography; conformably depositing a conductive layer on the substrate; electrophoretically depositing a layer of photoresist on the conductive layer; exposing and developing the layer of photoresist to form a photomask; and using the photomask to pattern the conductive layer.
Claim 25
Independent Claim
54 words
A method for making a semiconductor structure comprising: forming a silicon substrate with a non-planar topography; conformably depositing a conductive layer on the substrate; electrophoretically depositing a layer of photoresist on the conductive layer; exposing and developing the layer of photoresist to form a photomask; and using the photomask to pattern the conductive layer.
Claim 26
Dependent Claim
32 words
The method as recited in claim 22 and wherein a surface area of an electrode during the electrophoretic depositing step is at least as great as a surface area of the substrate.
Claim 27
Dependent Claim
21 words
The method as recited in claim 22 and wherein the substrate is predipped in photoresist prior to the electrophoretic depositing step.
Claim 28
Dependent Claim
23 words
The method as recited in claim 22 and further comprising priming a surface of the conductive layer prior to the electrophoretic depositing step.
Claim 29
Dependent Claim
33 words
The method as recited in claim 22 and wherein the substrate includes a plurality of raised projections for forming contact structures for establishing an electrical connection to contact locations on the semiconductor die.
Claim 30
Dependent Claim
25 words
The method as recited in claim 26 and further comprising etching the conductive layer using the photomask to form conductive traces to the contact structures.
Claim 31
Dependent Claim
23 words
The method as recited in claim 27 and wherein each projection is formed with a height of from 1 μm to 100 μm.
Claim 32
Dependent Claim
21 words
The method as recited in claim 28 and wherein the conductive layer and conductive traces are formed of a same material.
Claim 33
Dependent Claim
18 words
The method as recited in claim 28 and wherein the conductive layer is formed as a bi-metal stack.
Claim 34
Dependent Claim
14 words
The method as claimed in claim 22 and wherein the substrate includes semiconductor devices.
Claim 35
Independent Claim
76 words
A method for forming an interconnect for testing an unpackaged semiconductor die, comprising forming a substrate with a plurality of raised projections corresponding to contact locations on the die; forming an insulating layer on the substrate and projections; conformably depositing a conductive layer on the insulating layer; electrophoretically depositing a layer of photoresist on the conductive layer; exposing and developing the layer of photoresist to form a photomask; and patterning the conductive layer using the photomask.
Claim 36
Independent Claim
76 words
A method for forming an interconnect for testing an unpackaged semiconductor die, comprising forming a substrate with a plurality of raised projections corresponding to contact locations on the die; forming an insulating layer on the substrate and projections; conformably depositing a conductive layer on the insulating layer; electrophoretically depositing a layer of photoresist on the conductive layer; exposing and developing the layer of photoresist to form a photomask; and patterning the conductive layer using the photomask.
Claim 37
Dependent Claim
24 words
The method as recited in claim 32 and wherein the raised projections include a sidewall and a tip portion covered by the conductive layer.
Claim 38
Dependent Claim
33 words
The method as recited in claim 32 and wherein the conductive layer comprises a material selected from the group consisting of aluminum, copper, titanium, tungsten, tantalum, platinum, molybdenum, cobalt, nickel, gold and iridium.
Claim 39
Dependent Claim
27 words
The method as recited in claim 32 and wherein a surface area of the electrode is equal to or greater than a surface area of the substrate.
Claim 40
Dependent Claim
18 words
The method as recited in claim 32 and wherein the substrate is predipped in a solution of photoresist.
Claim 41
Dependent Claim
29 words
The method as recited in claim 32 and wherein a voltage source establishes a voltage of from about 50 volts to about 500 volts during the electrophoretic depositing step.
Claim 42
Dependent Claim
29 words
The method as recited in claim 32 and wherein a voltage is applied during the electrophoretic depositing step for a duration of about 0.1 seconds to about 60 seconds.
Claim 43
Dependent Claim
28 words
The method as recited in claim 32 and wherein a temperature of the photoresist during the electrophoretic depositing step is from about 15° C. to about 40° C.
Claim 44
Dependent Claim
31 words
The method as recited in claim 32 and wherein a distance between an electrode and the substrate during the electrophoretic depositing step is from about 0.3 inches to about 5 inches.
Claim 45
Dependent Claim
23 words
The method as recited in claim 32 and further comprising priming a surface of the conductive layer prior to the electrophoretic depositing step.
Claim 46
Dependent Claim
16 words
The method as recited in claim 41 and wherein the surface is primed with hexamethyldisilazane (HMDS).
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2000-03-03 | 2000-09-02 | 2001-03-04 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2004-03-03 | 2004-09-02 | 2005-03-04 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2008-03-03 | 2008-09-02 | 2009-03-04 | $7700.00 | Window Closed / Lapsed |