Patent US5596227A successfully refreshed from Google Patents.
← Back to Patent Explorer
US5596227A Expired / Lapsed US ⏱️ 0.0 years remaining

Ball grid array type semiconductor device

Assignee: Yamaha Corp
•
Filing: 1995-09-01
•
Granted: 1997-01-21
•
Expires: 2015-09-01
📄 Original PDF 🌐 Google Patents 🔄 Sync Now

Abstract

Abstract A mother board has wiring patterns formed on the front and rear surfaces thereof. A solder ball is formed on an island at the end of each wiring pattern on the rear surface. Vias are formed in the mother board, surrounding an LSI mount area of the board. An LSI chip mounted on the mother board is sealed by a front surface sealing resin layer. A rear surface sealing resin layer having substantially the same size and thickness as those of the front surface sealing resin is molded on the rear surface of the mother board at the position registered to the front surface sealing resin layer. The front and rear surface sealing resin layers are integrally formed through the vias. Resin layers in the vias function as anchors for integrating the upper and lower sealing resin layers. Semiconductor devices of a resin molded type are provided which can improve reliability.

Inventors

  • 👤 Hiroshi Saito

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-05 23:43
CPC Classifications
H; H05; H05K; H05K1/00; H05K1/02; H05K1/14; H05K1/141; H05K1/18; H05K1/182; H10; H10W; H10W90/00; H10W90/701; H10W90/811; H05K2201/00; H05K2201/04; H05K2201/049; H05K2201/09; H05K2201/09009; H05K2201/09072; H05K2201/10; H05K2201/10613; H05K2201/10621; H05K2201/10734; H05K3/00; H05K3/30; H05K3/32; H05K3/34; H05K3/341; H05K3/3431; H05K3/3436; H05K3/36; H05K3/368; H10W72/00; H10W72/60; H10W74/00; H10W90/20; H10W90/22; H10W90/291; H10W90/721; H10W90/751; H10W90/754; H10W90/756

Claims Analysis

Total Claims: 18
Claim 1
Independent Claim 156 words
A semiconductor device comprising: a board with a plurality of wiring patterns: an LSI chip mounted on a front surface of the board at a mounting area thereof; a front surface sealing resin layer for sealing the LSI chip mounted on the front surface of the board; and a rear surface sealing resin layer for sealing a rear surface of the board at a position registered to the front surface sealing resin layer, the rear surface sealing resin layer having substantially the same size and thickness as those of the front surface sealing resin layer; through holes formed in the board at a peripheral area thereof, the plurality of wiring patters extending from the front surface to the rear surface via the through holes; and solder balls formed on the wiring patterns formed on the rear surface of the board, the solder balls being formed at an outside area of the rear surface sealing resin layer.
Claim 2
Dependent Claim 156 words
A semiconductor device comprising: a board with a plurality of wiring patterns: an LSI chip mounted on a front surface of the board at a mounting area thereof; a front surface sealing resin layer for sealing the LSI chip mounted on the front surface of the board; and a rear surface sealing resin layer for sealing a rear surface of the board at a position registered to the front surface sealing resin layer, the rear surface sealing resin layer having substantially the same size and thickness as those of the front surface sealing resin layer; through holes formed in the board at a peripheral area thereof, the plurality of wiring patters extending from the front surface to the rear surface via the through holes; and solder balls formed on the wiring patterns formed on the rear surface of the board, the solder balls being formed at an outside area of the rear surface sealing resin layer.
Claim 3
Dependent Claim 23 words
A semiconductor device according to claim 1, wherein the wiring patterns are formed on the board at an area outward from the vias.
Claim 4
Dependent Claim 38 words
A semiconductor device according to claim 2, further comprising bonding wires for electrical connection between the LSI chip and ends of the wiring patterns on the front surface, the front surface sealing resin layer sealing the bonding wires.
Claim 5
Dependent Claim 30 words
A semiconductor device according to claim 1, wherein the plurality of wiring patterns continuously extend from the Front surface to the rear surface of the board via the through holes.
Claim 6
Dependent Claim 14 words
A semiconductor device according to claim 4, wherein the board is a multi-layer board.
Claim 7
Dependent Claim 20 words
A semiconductor device according to claim 5, further comprising another LSI chip mounted on the rear surface of the board.
Claim 8
Dependent Claim 31 words
A semiconductor device according to claim 1, wherein the board and the LSI chip are rectangular, and the vias are four elongated slit holes formed along sides of the LSI chip.
Claim 9
Dependent Claim 40 words
A semiconductor device according to claim 7, wherein the wiring patterns include four sets of wiring patterns, each set being formed on the board at an area outward from the vias and inward from a corresponding side of the board.
Claim 10
Dependent Claim 218 words
A semiconductor device comprising: a board with a plurality of wiring patterns, the board having an LSI chip mount hole; a heat sink disposed on a rear surface of the board and closing the LSI chip mount hole, the heat sink having a mount area for an LSI chip; an LSI chip mounted on the heat sink in the LSI chip mount hole of the board, the LSI chip being mounted on the heat sink at the mount area thereof; a front surface sealing resin layer for sealing the LSI chip mounted the heat sink and a front surface of the board; a rear surface sealing resin layer for sealing the rear surface of the board at an area where the heat sink is disposed; vias formed in the heat sink near the mount area for the LSI chip, the front surface sealing resin layer and the rear surface sealing resin layer being integrated through the vias; through holes formed in the board at the peripheral area thereof, the plurality of wiring patters extending from the front surface to the rear surface via the through holes; and solder balls formed on the wiring patterns formed on the rear surface of the board, the solder balls being formed at an outside area of the rear surface sealing resin layer.
Claim 11
Dependent Claim 218 words
A semiconductor device comprising: a board with a plurality of wiring patterns, the board having an LSI chip mount hole; a heat sink disposed on a rear surface of the board and closing the LSI chip mount hole, the heat sink having a mount area for an LSI chip; an LSI chip mounted on the heat sink in the LSI chip mount hole of the board, the LSI chip being mounted on the heat sink at the mount area thereof; a front surface sealing resin layer for sealing the LSI chip mounted the heat sink and a front surface of the board; a rear surface sealing resin layer for sealing the rear surface of the board at an area where the heat sink is disposed; vias formed in the heat sink near the mount area for the LSI chip, the front surface sealing resin layer and the rear surface sealing resin layer being integrated through the vias; through holes formed in the board at the peripheral area thereof, the plurality of wiring patters extending from the front surface to the rear surface via the through holes; and solder balls formed on the wiring patterns formed on the rear surface of the board, the solder balls being formed at an outside area of the rear surface sealing resin layer.
Claim 12
Dependent Claim 16 words
A semiconductor device according to claim 9, wherein the heat sink is adhered to the board.
Claim 13
Dependent Claim 38 words
A semiconductor device according to claim 9, further comprising bonding wires for electrical connection between the LSI chip and ends of the wiring patterns on the front surface, the front surface sealing resin layer sealing the bonding wires.
Claim 14
Dependent Claim 30 words
A semiconductor device according to claim 9, wherein the plurality of wiring patterns continuously extend from the front surface to the rear surface of the board via the through holes.
Claim 15
Dependent Claim 14 words
A semiconductor device according to claim 12, wherein the board is a multi-layer board.
Claim 16
Dependent Claim 20 words
A semiconductor device according to claim 13, further comprising another LSI chip mounted on the rear surface of the board.
Claim 17
Dependent Claim 37 words
A semiconductor device according to claim 9, wherein the board, the LSI chip mount hole, and the LSI chip, are rectangular, and the vias are four elongated slit holes formed along the sides of the LSI chip.
Claim 18
Dependent Claim 24 words
A semiconductor device according to claim 9, wherein the LSI chip has a thickness same as, or smaller than, a thickness of the board.

References Cited (Backward Citations)

JPH0476945A Cited
JPH04215461A Cited
US5285352A Cited
US5394298A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 2000-01-21 2000-07-22 2001-01-21 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2004-01-21 2004-07-22 2005-01-21 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2008-01-21 2008-07-22 2009-01-21 $7700.00 Window Closed / Lapsed

Assigned Categories & Tags

No categories assigned to this patent yet.

Assign Category Tag