Patent US3286682A successfully refreshed from Google Patents.
Patent US5595937A successfully refreshed from Google Patents.
US5595937A
Expired / Lapsed
US
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Method for fabricating semiconductor device with interconnections buried in trenches
Assignee: NEC Electronics Corp
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Filing: 1996-04-12
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Granted: 1997-01-21
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Expires: 2016-04-12
Abstract
Abstract A silicon oxide film is formed on a silicon substrate with a diffusion layer, and a contact hole is formed in the silicon oxide film. A protective film made of an oxide film and a nitride film is formed over the whole surface of the substrate, and the contact hole is buried with a BPSG film. Another silicon oxide film is deposited over the substrate and an interconnection trench is formed in this silicon oxide film. After the BPSG film is removed, a TiN/Ti film is formed over the whole surface of the substrate. A Cu film is grown by MO-CVD, and thereafter the Cu film and TiN/Ti film on the surface of the substrate are partially removed by CMP. A highly reliable contact plug and a trench burying higher level interconnection are formed even where contacts are margin-less or where alignment errors are present.
Inventors
- 👤 Kaoru Mikagi
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-30 21:27
CPC Classifications
H; H10; H10W; H10W20/00; H10W20/01; H10W20/031; H10W20/032; H10W20/047; H10W20/033; H10W20/071; H10W20/074; H10W20/076; H10W20/081
Claims Analysis
Total Claims: 8
Claim 1
Independent Claim
196 words
A method for fabricating a semiconductor device comprising the steps of: a) forming a first insulating film covering one of a diffusion layer formed in a surface region of a semiconductor substrate and a lower level interconnection layer formed over the semiconductor substrate; b) forming an opening in said first insulating film, one of said opening exposing a surface of said diffusion layer and said lower level interconnection layer; c) forming a protective film covering an inside of said opening and a surface of said first insulating film; d) forming a planar film by burying a material in said opening, said material capable of being selectively removed relative to said protective film; e) forming a second insulating film covering said planar film and said first insulating film; f) forming an interconnection trench by selectively etching said second insulating film, said interconnection trench exposing a surface of said planar film; g) removing said planar film; h) exposing the surface of one of said diffusion layer and said lower level interconnection by removing said protective film at least at a bottom area of said opening; and i) forming a conductive film burying said opening and said interconnection trench.
Claim 2
Independent Claim
196 words
A method for fabricating a semiconductor device comprising the steps of: a) forming a first insulating film covering one of a diffusion layer formed in a surface region of a semiconductor substrate and a lower level interconnection layer formed over the semiconductor substrate; b) forming an opening in said first insulating film, one of said opening exposing a surface of said diffusion layer and said lower level interconnection layer; c) forming a protective film covering an inside of said opening and a surface of said first insulating film; d) forming a planar film by burying a material in said opening, said material capable of being selectively removed relative to said protective film; e) forming a second insulating film covering said planar film and said first insulating film; f) forming an interconnection trench by selectively etching said second insulating film, said interconnection trench exposing a surface of said planar film; g) removing said planar film; h) exposing the surface of one of said diffusion layer and said lower level interconnection by removing said protective film at least at a bottom area of said opening; and i) forming a conductive film burying said opening and said interconnection trench.
Claim 3
Dependent Claim
43 words
A method for fabricating a semiconductor device according to claim 1, said protective film formed at said step c) is one of a silicon oxide film, a silicon nitride film, and a laminate of a silicon oxide film and a silicon nitride film.
Claim 4
Dependent Claim
39 words
A method for fabricating a semiconductor device according to claim 1, wherein said planar film formed at said step d) is one of a phosphosilicate glass (PSG) film, a borosilicate glass (BSG) film, and a borophosphosilicate glass (BPSG) film.
Claim 5
Dependent Claim
38 words
A method for fabricating a semiconductor device according to claim 1, wherein at said step g), said planar film is selectively removed by exposing said planar film to a hydrogen fluoride containing gas in a low pressure atmosphere.
Claim 6
Dependent Claim
77 words
A method for fabricating a semiconductor device according to claim 1, wherein said step i) of forming a conductive film comprises the steps of: i-1) forming a first conductive layer over the whole surface of a resulting structure; i-2) depositing conductive material on said first conductive layer to form a second conductive layer burying said opening and said interconnection trench; and i-3) removing said second conductive layer and said first conductive layer on said second insulating film.
Claim 7
Dependent Claim
72 words
A method for fabricating a semiconductor device according to claim 5, wherein said first conductive layer formed at said step i-1) is one of a single and a multilevel conductive film made of a material selected from the group consisting of titanium (Ti), zirconium (Zr), hafnium (Hf), vanadium (V), tantalum (Ta), chromium (Cr), molybdenum (Mo), tungsten (W), alloy essentially consisting of these metals, nitride thereof, silicide thereof, carbide thereof, and boride thereof.
Claim 8
Dependent Claim
47 words
A method for fabricating a semiconductor device according to claim 5, wherein said second conductive layer formed at said step i-2) is made of a material selected from the group consisting of aluminum (Al), copper (Cu), gold (Au), silver (Ag), and alloy essentially consisting of these metals.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
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| 3.5 Years (Year 4) | 2000-01-21 | 2000-07-22 | 2001-01-21 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2004-01-21 | 2004-07-22 | 2005-01-21 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2008-01-21 | 2008-07-22 | 2009-01-21 | $7700.00 | Window Closed / Lapsed |