Method for programming a single EPROM or flash memory cell to store multiple bits of data that utilizes a punchthrough current

Claim 1

A method for programming a single floating-gate memory cell to have one of three or more threshold voltages, the memory cell having a source and drain formed a distance apart in the well that define a channel therebetween, a layer of first insulation material formed over the channel, a floating gate formed over the layer of first insulation material, a layer of second insulation material formed over the floating gate, and a control gate formed over the layer of second insulation material, the method comprising the steps of: selecting one of three or more programming voltages as a selected programming voltage, the three or more programming voltages corresponding to said three or more threshold voltages; applying a first voltage to the well; applying the first voltage to the source so that the source-to-well junction is in equilibrium; applying a second voltage to the drain so that the drain-to-well junction is reverse-biased, the drain-to-source voltage is positive, and a punchthrough current is induced to flow from the drain to the source; and applying the selected programming voltage to the control gate of the memory cell.

Claim 2

A method for programming a single floating-gate memory cell to have one of three or more threshold voltages, the memory cell having a source and drain formed a distance apart in the well that define a channel therebetween, a layer of first insulation material formed over the channel, a floating gate formed over the layer of first insulation material, a layer of second insulation material formed over the floating gate, and a control gate formed over the layer of second insulation material, the method comprising the steps of: selecting one of three or more programming voltages as a selected programming voltage, the three or more programming voltages corresponding to said three or more threshold voltages; applying a first voltage to the well; applying the first voltage to the source so that the source-to-well junction is in equilibrium; applying a second voltage to the drain so that the drain-to-well junction is reverse-biased, the drain-to-source voltage is positive, and a punchthrough current is induced to flow from the drain to the source; and applying the selected programming voltage to the control gate of the memory cell.

Claim 6

A method for programming a single floating-gate memory cell to have one of three or more threshold voltages, the memory cell having a source and drain formed a distance apart in the well that define a channel therebetween, a layer of first insulation material formed over the channel, a floating gate formed over the layer of first insulation material, a layer of second insulation material formed over the floating gate, and a control gate formed over the layer of second insulation material, the method comprising the steps of: providing the floating-gate memory cell so that a punchthrough current flows from the drain to source during programming; selecting one of three or more programming voltages as a selected programming voltage, the three or more programming voltages corresponding to said three or more threshold voltages; applying a first voltage to the well; applying the first voltage to the source so that a source-to-well junction is in equilibrium;. applying a second voltage to the drain so that a drain-to-well junction is reverse-biased, the second voltage being greater than the first voltage; and applying the selected programming voltage to the control gate of the memory cell for a time less than or equal to 50 milliseconds.

Claim 7

A method for programming a single floating-gate memory cell to have one of three or more threshold voltages, the memory cell having a source and drain formed a distance apart in the well that define a channel therebetween, a layer of first insulation material formed over the channel, a floating gate formed over the layer of first insulation material, a layer of second insulation material formed over the floating gate, and a control gate formed over the layer of second insulation material, the method comprising the steps of: providing the floating-gate memory cell so that a punchthrough current flows from the drain to source during programming; selecting one of three or more programming voltages as a selected programming voltage, the three or more programming voltages corresponding to said three or more threshold voltages; applying a first voltage to the well; applying the first voltage to the source so that a source-to-well junction is in equilibrium;. applying a second voltage to the drain so that a drain-to-well junction is reverse-biased, the second voltage being greater than the first voltage; and applying the selected programming voltage to the control gate of the memory cell for a time less than or equal to 50 milliseconds.

Claim 8

A method for programming a single floating-gate memory cell to have one of three or more threshold voltages, the memory cell having a source and drain formed a distance apart in the well that define a channel therebetween, a layer of first insulation material formed over the channel, a floating gate formed over the layer of first insulation material, a layer of second insulation material formed over the floating gate, and a control gate formed over the layer of second insulation material, the method comprising the steps of: selecting one of three or more programming voltages as a selected programming voltage, the three or more programming voltages corresponding to said three or more threshold voltages; and applying the selected programming voltage to the control gate, a first voltage to the source and well, and a second voltage to the drain so that the drain-to-well junction is reverse-biased, the drain-to-source voltage is positive, and a punchthrough current is induced to flow from the drain to the source.

Claim 9

A method for programming a single floating-gate memory cell to have one of three or more threshold voltages, the memory cell having a source and drain formed a distance apart in the well that define a channel therebetween, a layer of first insulation material formed over the channel, a floating gate formed over the layer of first insulation material, a layer of second insulation material formed over the floating gate, and a control gate formed over the layer of second insulation material, the method comprising the steps of: selecting one of three or more programming voltages as a selected programming voltage, the three or more programming voltages corresponding to said three or more threshold voltages; and applying the selected programming voltage to the control gate, a first voltage to the source and well, and a second voltage to the drain so that the drain-to-well junction is reverse-biased, the drain-to-source voltage is positive, and a punchthrough current is induced to flow from the drain to the source.