Process for producing a semiconductor structure including a plurality of vertical semiconductor devices and at least one lateral semiconductor device integrated in a semiconductor body

Claim 1

A method for producing a semiconductor structure having a plurality of vertical semiconductor devices and at least one lateral semiconductor device integrated in a semiconductor body, the semiconductor body having a first surface and a second surface located opposite the first surface, the second surface having a crystal structure along a <100> plane, the vertical semiconductor devices extending between the first and second surfaces and the at least one lateral semiconductor device being disposed beneath the first surface, the method comprising the steps of: a) forming at least one partial structure having the at least one lateral semiconductor device; b) forming a plurality of doped regions on the first surface of the semiconductor body outside of the partial structure; c) forming a plurality of partial regions embedded in the plurality of doped regions; d) surrounding the partial structure with an electrically-insulating wall extending to a first predetermined depth into the semiconductor body from the first surface; e) reducing a thickness of the semiconductor body to form a recess in the second surface in a region of the partial structure up to at least the electrically-insulating wall at the first predetermined depth from the first surface by etching the second surface using a KOH solution as an etching solution so that walls of the recess lie in a <111> plane of the semiconductor body; f) applying an insulating layer to a bottom of the recess; and g) applying at least one of a metalization layer and passivation layer to the first and second surfaces for forming the at least one lateral semiconductor component and the vertical semiconductor components.

Claim 2

A method for producing a semiconductor structure having a plurality of vertical semiconductor devices and at least one lateral semiconductor device integrated in a semiconductor body, the semiconductor body having a first surface and a second surface located opposite the first surface, the second surface having a crystal structure along a <100> plane, the vertical semiconductor devices extending between the first and second surfaces and the at least one lateral semiconductor device being disposed beneath the first surface, the method comprising the steps of: a) forming at least one partial structure having the at least one lateral semiconductor device; b) forming a plurality of doped regions on the first surface of the semiconductor body outside of the partial structure; c) forming a plurality of partial regions embedded in the plurality of doped regions; d) surrounding the partial structure with an electrically-insulating wall extending to a first predetermined depth into the semiconductor body from the first surface; e) reducing a thickness of the semiconductor body to form a recess in the second surface in a region of the partial structure up to at least the electrically-insulating wall at the first predetermined depth from the first surface by etching the second surface using a KOH solution as an etching solution so that walls of the recess lie in a <111> plane of the semiconductor body; f) applying an insulating layer to a bottom of the recess; and g) applying at least one of a metalization layer and passivation layer to the first and second surfaces for forming the at least one lateral semiconductor component and the vertical semiconductor components.

Claim 12

A method for producing a semiconductor structure having a plurality of vertical semiconductor devices and at least one lateral semiconductor device integrated in a semiconductor body, the semiconductor body having a first surface and a second surface located opposite the first surface, the vertical semiconductor devices extending between the first and second surfaces and the at least one lateral semiconductor device being disposed beneath the first surface, the method comprising the steps of: a) forming at least one partial structure having the at least one lateral semiconductor device; b) forming a plurality of doped regions on the first surface of the semiconductor body outside of the partial structure; c) forming a plurality of partial regions embedded in the plurality of doped regions; d) surrounding the partial structure with an electrically-insulating wall extending to a first predetermined depth into the semiconductor body from the first surface by steps including: plasma etching the first surface of the semiconductor body to form a trench for the electrically-insulating wall; and filling the trench with an electricallyinsulating material; e) reducing a thickness of the semiconductor body to form a recess in the second surface in a region of the partial structure up to at least the electrically-insulating wall at the first predetermined depth from the first surface f) applying an insulating layer to a bottom of the recess; and g) applying at least one of a metalization layer and passivation layer to the first and second surfaces for forming the at least one lateral semiconductor component and the vertical semiconductor components.

Claim 13

A method for producing a semiconductor structure having a plurality of vertical semiconductor devices and at least one lateral semiconductor device integrated in a semiconductor body, the semiconductor body having a first surface and a second surface located opposite the first surface, the vertical semiconductor devices extending between the first and second surfaces and the at least one lateral semiconductor device being disposed beneath the first surface, the method comprising the steps of: a) forming at least one partial structure having the at least one lateral semiconductor device; b) forming a plurality of doped regions on the first surface of the semiconductor body outside of the partial structure; c) forming a plurality of partial regions embedded in the plurality of doped regions; d) surrounding the partial structure with an electrically-insulating wall extending to a first predetermined depth into the semiconductor body from the first surface by steps including: plasma etching the first surface of the semiconductor body to form a trench for the electrically-insulating wall; and filling the trench with an electricallyinsulating material; e) reducing a thickness of the semiconductor body to form a recess in the second surface in a region of the partial structure up to at least the electrically-insulating wall at the first predetermined depth from the first surface f) applying an insulating layer to a bottom of the recess; and g) applying at least one of a metalization layer and passivation layer to the first and second surfaces for forming the at least one lateral semiconductor component and the vertical semiconductor components.

Claim 14

A method for producing a semiconductor structure having a plurality of vertical semiconductor devices and at least one lateral semiconductor device integrated in a semiconductor body, the semiconductor body having a first surface and a second surface located opposite the first surface, the vertical semiconductor devices extending between the first and second surfaces and the at least one lateral semiconductor device being disposed beneath the first surface, the method comprising the steps of: a) forming at least one partial structure having the at least one lateral semiconductor device; b) forming a plurality of doped regions on the first surface of the semiconductor body outside of the partial structure; c) forming a plurality of partial regions embedded in the plurality of doped regions; d) surrounding the partial structure with an electrically-insulating wall extending to a first predetermined depth into the semiconductor body from the first surface; e) reducing a thickness of the semiconductor body to form a recess in the second surface in a region of the partial structure up to at least the electrically-insulating wall at the first predetermined depth from the first surface; f) applying an insulating layer to a bottom of the recess; g) applying at least one of a metalization layer and passivation layer to the first and second surfaces for forming the at least one lateral semiconductor component and the vertical semiconductor components; h) forming a test window trench in the semiconductor body having a depth which coincides with the depth of the electrically-insulating wall and having a width which is greater than a width of the electrically-insulating wall; and i) reducing the thickness of the semiconductor body at the test window trench until a bottom of the test window trench is ruptured.

Claim 15

A method for producing a semiconductor structure having a plurality of vertical semiconductor devices and at least one lateral semiconductor device integrated in a semiconductor body, the semiconductor body having a first surface and a second surface located opposite the first surface, the vertical semiconductor devices extending between the first and second surfaces and the at least one lateral semiconductor device being disposed beneath the first surface, the method comprising the steps of: a) forming at least one partial structure having the at least one lateral semiconductor device; b) forming a plurality of doped regions on the first surface of the semiconductor body outside of the partial structure; c) forming a plurality of partial regions embedded in the plurality of doped regions; d) surrounding the partial structure with an electrically-insulating wall extending to a first predetermined depth into the semiconductor body from the first surface; e) reducing a thickness of the semiconductor body to form a recess in the second surface in a region of the partial structure up to at least the electrically-insulating wall at the first predetermined depth from the first surface; f) applying an insulating layer to a bottom of the recess; g) applying at least one of a metalization layer and passivation layer to the first and second surfaces for forming the at least one lateral semiconductor component and the vertical semiconductor components; h) forming a test window trench in the semiconductor body having a depth which coincides with the depth of the electrically-insulating wall and having a width which is greater than a width of the electrically-insulating wall; and i) reducing the thickness of the semiconductor body at the test window trench until a bottom of the test window trench is ruptured.