Patent US5587684A successfully refreshed from Google Patents.
US5587684A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Power down circuit for use in intergrated circuits
Assignee: Exar Corp
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Filing: 1995-05-12
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Granted: 1996-12-24
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Expires: 2015-05-12
Abstract
Abstract A method of including power control features to analog integrated circuits does not require the addition of separate power control input signal pin(s). One or more existing externally applied reference signals are sensed to determine if the signals are within specified operational limits. When the reference signals are outside of the operational limits the internal circuit blocks are switched off to their non-power dissipating state. When the reference signals are within the operational limits the internal circuit blocks are switched on to their normal operating state. This switching can be accomplished in various ways, including but not limited to a single switch in a series with the power supply or many distributed switches in each circuit block or stage.
Inventors
- 👤 Jose A. Salcedo
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-08 15:55
CPC Classifications
H; H03; H03K; H03K17/00; H03K17/30; H03K17/302; H03K17/22
Claims Analysis
Total Claims: 9
Claim 1
Independent Claim
134 words
A packaged analog integrated circuit having a package pin which receives a reference voltage from an external source for use as a reference in analog/digital voltage conversions, said circuit comprising a plurality of circuit stages each receiving electrical power from a power source, conductor means for applying said reference voltage from said external source to said integrated circuit, and power control circuitry for selectively controlling electrical power to said circuit stages in response to said reference voltage, said power control circuitry including switch means for connecting and disconnecting said power source to said circuit stages, logic means responsive to said reference voltage for controlling said switch means, said logic means including a comparator for comparing said reference voltage to an internal threshold voltage, and, means for generating said threshold voltage from said power source.
Claim 2
Dependent Claim
134 words
A packaged analog integrated circuit having a package pin which receives a reference voltage from an external source for use as a reference in analog/digital voltage conversions, said circuit comprising a plurality of circuit stages each receiving electrical power from a power source, conductor means for applying said reference voltage from said external source to said integrated circuit, and power control circuitry for selectively controlling electrical power to said circuit stages in response to said reference voltage, said power control circuitry including switch means for connecting and disconnecting said power source to said circuit stages, logic means responsive to said reference voltage for controlling said switch means, said logic means including a comparator for comparing said reference voltage to an internal threshold voltage, and, means for generating said threshold voltage from said power source.
Claim 3
Dependent Claim
31 words
The analog integrated circuit as defined by claim 1 wherein said means for generating comprises a diode and a resister serially connected between said power source and a second reference voltage.
Claim 4
Dependent Claim
16 words
The analog integrated circuit as defined by claim 2 wherein said second reference voltage is ground.
Claim 5
Dependent Claim
46 words
The analog integrated circuit as defined by claim 1 wherein said logic means further includes a logic gate responsive t said reference voltage as a first input to said logic gate and including a second input for receiving a power control signal from another external source.
Claim 6
Dependent Claim
17 words
The analog integrated circuit as defined by claim 4 wherein said logic gate comprises a NAND gate.
Claim 7
Dependent Claim
37 words
The analog integrated circuit as defined by claim 5 wherein said switch means comprises a field effect transistor having a gate terminal, an output of said logic gate providing a bias voltage to said field effect transistor.
Claim 8
Dependent Claim
32 words
The analog integrated circuit as defined by claim 6 wherein said switch means comprises a plurality of field effect transistors each connecting said power source to respective ones of said circuit stages.
Claim 9
Dependent Claim
20 words
The analog integrated circuit as defined by claim 6 wherein said analog integrated circuit comprises an analog to digital converter.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1999-12-24 | 2000-06-24 | 2000-12-24 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2003-12-24 | 2004-06-24 | 2004-12-24 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2007-12-24 | 2008-06-24 | 2008-12-24 | $7700.00 | Window Closed / Lapsed |