US5569624A
Expired / Lapsed
US
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Method for shallow junction formation
Assignee: University of California
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Filing: 1995-06-05
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Granted: 1996-10-29
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Expires: 2015-06-05
Abstract
Abstract A doping sequence that reduces the cost and complexity of forming source/drain regions in complementary metal oxide silicon (CMOS) integrated circuit technologies. The process combines the use of patterned excimer laser annealing, dopant-saturated spin-on glass, silicide contact structures and interference effects creates by thin dielectric layers to produce source and drain junctions that are ultrashallow in depth but exhibit low sheet and contact resistance. The process utilizes no photolithography and can be achieved without the use of expensive vacuum equipment. The process margins are wide, and yield loss due to contact of the ultrashallow dopants is eliminated.
Inventors
- 👤 Kurt H. Weiner
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-29 13:23
CPC Classifications
H; H10; H10D; H10D30/00; H10D30/01; H10D30/021; H10D30/0223; H10D30/0227; H10P; H10P32/00; H10P32/10; H10P32/14; H10D84/00; H10D84/01; H10D84/0123; H10D84/0126; H10D84/0165; H10D84/017; H10D84/02; H10D84/03; H10D84/038; H10P32/1408; H10P32/141; H10P32/1414; H10P32/17; H10P32/171; Y; Y10; Y10S; Y10S148/00; Y10S148/09; Y10S438/00; Y10S438/914; Y10S438/923
Claims Analysis
Total Claims: 23
Claim 1
Independent Claim
117 words
Improved method for shallow junction formation in at least the source/drain regions of an integrated circuit, comprising: providing at least the source and the drain regions with a layer of undoped silicide, depositing a layer of doped dielectric material on at least the layer of undoped silicide, directing patterned pulsed laser energy onto the doped dielectric material covering at least the source and drain causing dopant in the dielectric material to diffuse into the silicide, removing the dielectric material, and annealing at least the silicide over the source and drain regions to drive dopant from the silicide to form junctions of doped material having a thickness of less than 100 nm in the source and drain regions.
Claim 2
Dependent Claim
117 words
Improved method for shallow junction formation in at least the source/drain regions of an integrated circuit, comprising: providing at least the source and the drain regions with a layer of undoped silicide, depositing a layer of doped dielectric material on at least the layer of undoped silicide, directing patterned pulsed laser energy onto the doped dielectric material covering at least the source and drain causing dopant in the dielectric material to diffuse into the silicide, removing the dielectric material, and annealing at least the silicide over the source and drain regions to drive dopant from the silicide to form junctions of doped material having a thickness of less than 100 nm in the source and drain regions.
Claim 3
Dependent Claim
21 words
The improved method of claim 1, additionally including curing the doped dielectric material prior to directing patterned pulsed laser energy thereonto.
Claim 4
Dependent Claim
26 words
The improved method of claim 1, additionally including forming the source/drain regions of a material selected from the group consisting of silicon, silicon-germanium, silicon-carbide, and gallium-arsenide.
Claim 5
Dependent Claim
26 words
The improved method of claim 1, additionally including forming the undoped silicide from a material selected from the group consisting of titanium, tungsten, platinum, and cobalt.
Claim 6
Dependent Claim
46 words
The improved method of claim 1, additionally including forming the doped dielectric material from a material selected from the group consisting of silicon dioxide, silicon nitride, aluminum oxide, and any dielectric either transparent or semi-transparent in the ultraviolet region of the electromagnetic spectrum 50 nm≦λ≦380 nm).
Claim 7
Dependent Claim
27 words
The improved method of claim 1, wherein the doped dielectric material is selected from the group consisting of material containing n-type dopants and material containing p-type dopants.
Claim 8
Dependent Claim
33 words
The improved method of claim 1, wherein the doped dielectric material is deposited to a thickness capable of producing constructive interference and raising light absorption in the silicide during the pulsed laser step.
Claim 9
Dependent Claim
47 words
The improved method of claim 1, wherein the doped dielectric material is deposited to the thickness of (2j+1)×0.25×λ/n, where j is an integer greater than or equal to zero, λ is the wavelength of the laser light, and n is the refractive index of the dielectric material.
Claim 10
Dependent Claim
18 words
The improved method of claim 1, wherein the patterned pulsed laser energy is produced by an excimer laser.
Claim 11
Independent Claim
130 words
A method of forming submicron junctions in at least the source and drain regions of a metal-oxide-semiconductor having a layer of silicide over at least the source and drain regions, comprising; depositing a layer of doped spin-on glass on at least the layer of silicide over the source and drain regions; curing the thus deposited layer of doped spin-on glass; directing patterned pulsed energy onto at least the layer of doped spin-on glass over the source and drain regions, causing heating of the silicide and allowing dopant in the spin-on glass to diffuse only into the silicide; and annealing the source and drain regions, causing the dopants in the silicide to be driven into the source and drain regions forming a junction therein of a thickness less than 100 nm.
Claim 12
Independent Claim
130 words
A method of forming submicron junctions in at least the source and drain regions of a metal-oxide-semiconductor having a layer of silicide over at least the source and drain regions, comprising; depositing a layer of doped spin-on glass on at least the layer of silicide over the source and drain regions; curing the thus deposited layer of doped spin-on glass; directing patterned pulsed energy onto at least the layer of doped spin-on glass over the source and drain regions, causing heating of the silicide and allowing dopant in the spin-on glass to diffuse only into the silicide; and annealing the source and drain regions, causing the dopants in the silicide to be driven into the source and drain regions forming a junction therein of a thickness less than 100 nm.
Claim 13
Dependent Claim
19 words
The method of claim 10, additionally including removing the spin-on glass prior to annealing the source and drain regions.
Claim 14
Dependent Claim
26 words
The method of claim 10, wherein the doped spin-on glass is selected from the group consisting of n-type doped spin-on glass and p-type doped spin-on glass.
Claim 15
Dependent Claim
72 words
The method of claim 12, wherein one of the n-type and p-type doped spin-on glass is first deposited on certain areas of the silicide and then irradiated by the patterned pulsed energy, whereafter the other of the n-type and p-type doped spin-on glass is deposited on certain other areas of the silicide, and then irradiated by the patterned pulsed energy, whereafter the annealing of the source and drain regions is carried out.
Claim 16
Dependent Claim
31 words
The method of claim 13, additionally including removing the one of the n-type and p-type doped spin-on glass prior to depositing the other of the n-type and p-type doped spin-on glass.
Claim 17
Dependent Claim
17 words
The method of claim 10, wherein the patterned pulsed energy is produced by a pulsed excimer laser.
Claim 18
Dependent Claim
77 words
In a process for producing a metal-oxide semiconductor having a source, drain and gate covered by silicide, the improvement comprising: depositing doped spin-on glass on the silicide, curing the deposited doped spin-on glass, irradiating the deposited doped spin-on glass with patterned pulsed laser energy, causing doping of the silicide, removing the spin-on glass, and thermally annealing at least the source and drain thereby forming submicron junctions in the surface of the drain and source adjacent the silicide.
Claim 19
Dependent Claim
77 words
In a process for producing a metal-oxide semiconductor having a source, drain and gate covered by silicide, the improvement comprising: depositing doped spin-on glass on the silicide, curing the deposited doped spin-on glass, irradiating the deposited doped spin-on glass with patterned pulsed laser energy, causing doping of the silicide, removing the spin-on glass, and thermally annealing at least the source and drain thereby forming submicron junctions in the surface of the drain and source adjacent the silicide.
Claim 20
Dependent Claim
22 words
The improvement of claim 16, additionally including forming the doped spin-on glass to include a dopant selected from n-type and p-type dopants.
Claim 21
Dependent Claim
32 words
The improvement of claim 17, wherein n-type doped spin-on glass and p-type doped spin-on glass are deposited on different areas of the silicide, whereby irradiation thereof causes n-doped and p-doped silicide areas.
Claim 22
Independent Claim
154 words
A method for forming sub-micron junctions in the source and the drain of an MOS, comprising: forming a silicide on an undoped polysilicon gate, depositing a first layer of doped dielectric material on the silicide, curing the first layer of doped dielectric material, irradiating the first layer of doped dielectric material with patterned pulsed laser energy, causing doping of the silicide, removing the first layer of dielectric material, depositing a second layer of doped dielectric material on the source and drain areas, depositing a layer of undoped dielectric material on the doped silicide, patterning the undoped dielectric material, irradiating the second layer of doped dielectric material with patterned pulsed laser energy, causing doping of the source and drain area, removing the second layer of dielectric material, and annealing at least the source and drain areas, resulting in the formation of junctions in the source and drain areas of a thickness less than 1 micron.
Claim 23
Independent Claim
154 words
A method for forming sub-micron junctions in the source and the drain of an MOS, comprising: forming a silicide on an undoped polysilicon gate, depositing a first layer of doped dielectric material on the silicide, curing the first layer of doped dielectric material, irradiating the first layer of doped dielectric material with patterned pulsed laser energy, causing doping of the silicide, removing the first layer of dielectric material, depositing a second layer of doped dielectric material on the source and drain areas, depositing a layer of undoped dielectric material on the doped silicide, patterning the undoped dielectric material, irradiating the second layer of doped dielectric material with patterned pulsed laser energy, causing doping of the source and drain area, removing the second layer of dielectric material, and annealing at least the source and drain areas, resulting in the formation of junctions in the source and drain areas of a thickness less than 1 micron.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1999-10-29 | 2000-04-29 | 2000-10-29 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2003-10-29 | 2004-04-29 | 2004-10-29 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2007-10-29 | 2008-04-29 | 2008-10-29 | $7700.00 | Window Closed / Lapsed |