Patent US5565706A successfully refreshed from Google Patents.
US5565706A
Expired / Lapsed
US
⏱️ 0.0 years remaining
LSI package board
Assignee: Hitachi Ltd
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Filing: 1995-03-20
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Granted: 1996-10-15
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Expires: 2015-03-20
Abstract
Abstract A thin and high-density package board used with general-purpose mainframe computers and high-speed processors is provided. On a ceramic substrate on which memory LSIs and a logic LSI with only elements formed without multilayer wiring are mounted, a multilayer wiring layer insuring signal transfer of the LSIs is formed, providing a thin package board.
Inventors
- 👤 Osamu Miura
- 👤 Akio Takahashi
- 👤 Takao Miwa
- 👤 Masahiro Suzuki
- 👤 Ryuji Watanabe
- 👤 Junichi Katagiri
- 👤 Yoichi Daiko
- 👤 Tsutomu Imai
- 👤 Haruo Akahoshi
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-03 12:45
CPC Classifications
H; H10; H10W; H10W70/00; H10W70/60; H10W70/67; H10W70/68; H05; H05K; H05K3/00; H05K3/46; H10W70/611; H10W70/614; H10W90/00; H10W70/099; H10W70/682; H10W72/00; H10W72/071; H10W72/073; H10W72/851; H10W72/874; H10W72/90; H10W72/941; H10W72/9413; H10W90/10; H10W90/701; H10W90/721; H10W90/724; H10W90/731; H10W90/734
Claims Analysis
Total Claims: 30
Claim 1
Independent Claim
105 words
A package board comprising at least one memory large-scaled integrated circuit device, at least one logic large-scaled integrated circuit device, a substrate for mounting said devices, and a multilayer wiring circuit layer formed on said substrate, wherein signal circuitry of said memory and logic large-scaled integrated circuit devices is formed in said multilayer wiring circuit layer, on said substrate, and is electrically connected to said memory and logic large-scaled integrated circuit devices via external terminals of said memory and logic large-scaled integrated circuit devices, said multilayer wiring circuit layer having a smaller wiring resistance than that of said memory and logic large-scaled integrated circuit devices.
Claim 2
Dependent Claim
105 words
A package board comprising at least one memory large-scaled integrated circuit device, at least one logic large-scaled integrated circuit device, a substrate for mounting said devices, and a multilayer wiring circuit layer formed on said substrate, wherein signal circuitry of said memory and logic large-scaled integrated circuit devices is formed in said multilayer wiring circuit layer, on said substrate, and is electrically connected to said memory and logic large-scaled integrated circuit devices via external terminals of said memory and logic large-scaled integrated circuit devices, said multilayer wiring circuit layer having a smaller wiring resistance than that of said memory and logic large-scaled integrated circuit devices.
Claim 3
Dependent Claim
104 words
A package board comprising at least one memory large-scaled integrated circuit device, at least one logic large-scaled integrated circuit device, a substrate for mounting said devices, and a multilayer wiring circuit layer formed on said substrate, wherein signal circuitry of said memory and logic large-scaled integrated circuit devices is formed in said multilayer wiring circuit layer, on said substrate, and is electrically connected to said memory and logic large-scaled integrated circuit devices via external terminals Of said memory and logic large-scaled integrated circuit devices, said multilayer wiring circuit layer having a characteristic impedance of 50-250 Ω and a wiring pitch of 1 μm-50 μm.
Claim 4
Dependent Claim
104 words
A package board comprising at least one memory large-scaled integrated circuit device, at least one logic large-scaled integrated circuit device, a substrate for mounting said devices, and a multilayer wiring circuit layer formed on said substrate, wherein signal circuitry of said memory and logic large-scaled integrated circuit devices is formed in said multilayer wiring circuit layer, on said substrate, and is electrically connected to said memory and logic large-scaled integrated circuit devices via external terminals Of said memory and logic large-scaled integrated circuit devices, said multilayer wiring circuit layer having a characteristic impedance of 50-250 Ω and a wiring pitch of 1 μm-50 μm.
Claim 5
Dependent Claim
101 words
A package board comprising at least one memory large-scaled integrated circuit device, at least one logic large-scaled integrated circuit device, a substrate for mounting said devices, and a multilayer wiring circuit layer formed on said substrate, wherein signal circuitry of said memory and logic large-scaled integrated circuit devices is formed in said multilayer wiring circuit layer, on said substrate, and is electrically connected to said memory and logic large-scaled integrated circuit devices via external terminals of said memory and logic large-scaled integrated circuit devices, and wherein matching of signal transfer in an operation frequency zone of 500 MHz-10 GHz is enabled.
Claim 6
Dependent Claim
101 words
A package board comprising at least one memory large-scaled integrated circuit device, at least one logic large-scaled integrated circuit device, a substrate for mounting said devices, and a multilayer wiring circuit layer formed on said substrate, wherein signal circuitry of said memory and logic large-scaled integrated circuit devices is formed in said multilayer wiring circuit layer, on said substrate, and is electrically connected to said memory and logic large-scaled integrated circuit devices via external terminals of said memory and logic large-scaled integrated circuit devices, and wherein matching of signal transfer in an operation frequency zone of 500 MHz-10 GHz is enabled.
Claim 7
Dependent Claim
97 words
A package, board comprising at least one memory large-scaled integrated circuit device, at least one logic large-scaled integrated circuit device, a substrate in which said devices are embedded, and a multilayer wiring circuit layer formed on said substrate, wherein signal circuitry of said memory and logic large-scaled integrated circuit devices is formed in said multilayer wiring circuit layer, on said substrate, and is electrically connected to said memory and logic large-scaled integrated circuit devices via external terminals of said memory and logic large-scaled integrated circuit devices, said package board having a thickness of 1 mm or less.
Claim 8
Dependent Claim
97 words
A package, board comprising at least one memory large-scaled integrated circuit device, at least one logic large-scaled integrated circuit device, a substrate in which said devices are embedded, and a multilayer wiring circuit layer formed on said substrate, wherein signal circuitry of said memory and logic large-scaled integrated circuit devices is formed in said multilayer wiring circuit layer, on said substrate, and is electrically connected to said memory and logic large-scaled integrated circuit devices via external terminals of said memory and logic large-scaled integrated circuit devices, said package board having a thickness of 1 mm or less.
Claim 9
Dependent Claim
111 words
A memory large-scaled integrated circuit element card comprising a package board comprising at least one memory large-scaled integrated circuit device, a substrate for mounting said device, and a multilayer wiring circuit layer formed on said substrate, wherein signal circuitry of said at least one memory large-scaled integrated circuit device is formed in said multilayer wiring circuit layer on said substrate and is electrically connected to said at least one memory large-scaled integrated circuit device via external terminals of each of said at least one memory large-scaled integrated circuit device, said multilayer wiring circuit layer having a smaller wiring resistance than that of said at least one memory large-scaled integrated circuit device.
Claim 10
Dependent Claim
111 words
A memory large-scaled integrated circuit element card comprising a package board comprising at least one memory large-scaled integrated circuit device, a substrate for mounting said device, and a multilayer wiring circuit layer formed on said substrate, wherein signal circuitry of said at least one memory large-scaled integrated circuit device is formed in said multilayer wiring circuit layer on said substrate and is electrically connected to said at least one memory large-scaled integrated circuit device via external terminals of each of said at least one memory large-scaled integrated circuit device, said multilayer wiring circuit layer having a smaller wiring resistance than that of said at least one memory large-scaled integrated circuit device.
Claim 11
Dependent Claim
20 words
A package board according to claim 3, which is provided for use in a local area network integrated circuit card.
Claim 12
Dependent Claim
20 words
A package board according to claim 2, which is provided for use in a local area network integrated circuit card.
Claim 13
Dependent Claim
20 words
A package board according to claim 3, which is provided for use in a local area network integrated circuit card.
Claim 14
Dependent Claim
28 words
A package board according to claim 1, wherein said multilayer wiring circuit layer has a characteristic impedance of 50-250 Ω and a wiring pitch of 1 μm-50 μm.
Claim 15
Dependent Claim
31 words
A package board according to claim 9, wherein said multilayer wiring circuit layer is such that matching of signal transfer in an operation frequency zone of 500 MHz-10 GHz is enabled.
Claim 16
Dependent Claim
31 words
A package board according to claim 1, wherein said multilayer wiring circuit layer is such that matching of signal transfer in an operation frequency zone of 500 MHz-10 GHz is enabled.
Claim 17
Dependent Claim
19 words
A package board according to claim 10, wherein said package board has a thickness of 1 mm or less.
Claim 18
Dependent Claim
19 words
A package board according to claim 9, wherein said package board has a thickness of 1 mm or less.
Claim 19
Dependent Claim
19 words
A package board according to claim 1, wherein said package board has a thickness of 1 mm or less.
Claim 20
Dependent Claim
29 words
A package board according to claim 1, wherein said substrate is provided with recessed portions for embedding therein individual ones of said memory and logic large-scaled integrated circuit devices.
Claim 21
Dependent Claim
29 words
A package board according to claim 2, wherein said substrate is provided with recessed portions for embedding therein individual ones of said memory and logic large-scaled integrated circuit devices.
Claim 22
Dependent Claim
29 words
A package board according to claim 3, wherein said substrate is provided with recessed portions for embedding therein individual ones of said memory and logic large-scaled integrated circuit devices.
Claim 23
Dependent Claim
29 words
A package board according to claim 4, wherein said substrate is provided with recessed portions for embedding therein individual ones of said memory and logic large-scaled integrated circuit devices.
Claim 24
Dependent Claim
40 words
A package board according to claim 1, wherein said external terminals of said memory and logic large-scaled integrated circuit devices are led out from a side of said substrate opposite that on which said multilayer wiring circuit layer is provided.
Claim 25
Dependent Claim
40 words
A package board according to claim 2, wherein said external terminals of said memory and logic large-scaled integrated circuit devices are led out from a side of said substrate opposite that on which said multilayer wiring circuit layer is provided.
Claim 26
Dependent Claim
40 words
A package board according to claim 3, wherein said external terminals of said memory and logic large-scaled integrated circuit devices are led out from a side of said substrate opposite that on which said multilayer wiring circuit layer is provided.
Claim 27
Dependent Claim
40 words
A package board according to claim 4, wherein said external terminals of said memory and logic large-scaled integrated circuit devices are led out from a side of said substrate opposite that on which said multilayer wiring circuit layer is provided.
Claim 28
Dependent Claim
27 words
A package board according to claim 5, wherein said multilayer wiring circuit layer has a characteristic impedance of 50-250 Ω and wiring pitch of 1 μm-50 μm.
Claim 29
Dependent Claim
111 words
A memory large-scaled integrated circuit element card comprising a package board comprising at least one memory large-scaled integrated circuit device, a substrate for mounting said device, and a multilayer wiring circuit layer formed on said substrate, wherein signal circuitry of said at least one memory large-scaled integrated circuit device is formed in said multilayer wiring circuit layer on said substrate and is electrically connected to said at least one memory large-scaled integrated circuit device via external terminals of each of said at least one memory large-scaled integrated circuit device, and wherein said multilayer wiring circuit layer has a characteristic impedance of 50-250 Ω and a wiring pitch of 1 μm-50 μm.
Claim 30
Dependent Claim
111 words
A memory large-scaled integrated circuit element card comprising a package board comprising at least one memory large-scaled integrated circuit device, a substrate for mounting said device, and a multilayer wiring circuit layer formed on said substrate, wherein signal circuitry of said at least one memory large-scaled integrated circuit device is formed in said multilayer wiring circuit layer on said substrate and is electrically connected to said at least one memory large-scaled integrated circuit device via external terminals of each of said at least one memory large-scaled integrated circuit device, and wherein said multilayer wiring circuit layer has a characteristic impedance of 50-250 Ω and a wiring pitch of 1 μm-50 μm.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1999-10-15 | 2000-04-15 | 2000-10-15 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2003-10-15 | 2004-04-15 | 2004-10-15 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2007-10-15 | 2008-04-15 | 2008-10-15 | $7700.00 | Window Closed / Lapsed |