Loss compensated gain cell for distributed amplifiers

Claim 2

An electrical circuit comprising: an amplifier including an amplifier input and an amplifier output; a gain cell having low input and output losses at microwave frequencies due to input and output attenuation compensation of said gain cell, said gain cell being coupled between the amplifier input and the amplifier output for providing gain, said gain cell including: input means, coupled to said amplifier input and including a common-collector bipolar transistor having a base coupled to said amplifier input, for reducing input capacitance and resistive losses at microwave frequencies; and output means, coupled to said amplifier output and including a common-base bipolar transistor in series with a common emitter bipolar transistor, for reducing output resistive losses at microwave frequencies, of said common-collector bipolar transistor defining an equivalent circuit according to the right hand side of the following relationship: ##EQU9## wherein R.sub.π is a first parasitic resistance, C.sub.π is an input capacitance, β o is an ac beta at low frequencies, R b is a second parasitic resistance, R e is a third parasitic resistance, and wherein the size and bias of said common-emitter bipolar transistor, which determines an effective input capacitance of said common-emitter bipolar transistor, is defined by C.

Claim 3

The electrical circuit of claim 1 wherein the gain cell further comprises: feedback means, associated with said output means, for stabilizing said gain cell wherein a collector of said common-base bipolar transistor is coupled to said amplifier output and wherein said feedback means includes a first feedback resistor having one end coupled to said collector of said common-base bipolar transistor and an opposite end coupled to a base of said common-base bipolar transistor, a second feedback resistor connected between said base of said common-base bipolar transistor and ground, and a third feedback resistor and a feedback capacitor connected in parallel to said second feedback resistor.

Claim 4

The electrical circuit of claim 2 wherein said amplifier is a distributed amplifier including a first input transmission line and an output transmission line, and a first plurality of said gain cells each having said input means coupled to said input transmission line and said output means coupled to said output transmission line; whereby said input means and said output means of each of said plurality of gain cells permit an increased number of gain cells without degrading gain and bandwidth performance.

Claim 5

The electrical circuit of claim 3, wherein said first input transmission line includes a plurality of inductive elements separating each said input means of said plurality of gain cells.

Claim 6

The electrical circuit of claim 3 wherein said distributed amplifier further includes a second input transmission line and a splitting means for splitting an input signal between said first and second input transmission lines.

Claim 7

The electrical circuit of claim 5 further comprising a second plurality of said gain cells each having said input means coupled to said second input transmission line and said output means coupled to said output transmission line.

Claim 8

The electrical circuit of claim 6 wherein said first plurality of gain cells and said second plurality of gain cells include the same number of gain cells; wherein an output means of a first gain cell of said first plurality of gain cells is coupled to an output means of a first gain cell of said second plurality of gain cells and to said output transmission line; and wherein an output means of a second gain cell of said first plurality of gain cells is coupled to an output means of a second gain cell of said second plurality of gain cells and to said output transmission line.

Claim 9

The electrical circuit of claim 7 wherein said first and second input transmission lines and said output transmission lines include a first and second input terminating impedance and an output terminating impedance.

Claim 10

The electrical circuit of claim 2 wherein an emitter of said common-collector bipolar transistor is coupled to a base of said common-emitter bipolar transistor and to a bias resistor.

Claim 11

A bipolar transistor gain cell having low input and output losses at microwave frequencies due to input and output attenuation compensation, comprising: an input; a first bipolar transistor having a base, a collector, and an emitter, wherein said base is coupled to said input; a second bipolar transistor having a base, a collector and an emitter, wherein said emitter of said first bipolar transistor is coupled to said base of said second bipolar transistor; a third bipolar transistor connected to said second bipolar transistor in a cascode configuration; and an output coupled to a collector of said third bipolar transistor; wherein the equivalent circuit of said first bipolar transistor defines the right hand side of the following relationship: ##EQU10## wherein R.sub.π is a first parasitic resistance, C.sub.π is an input capacitance, β o is an ac beta at low frequencies, R b is a second parasitic resistance, R e ms a third parasitic resistance, and wherein the size and bias of said common-emitter bipolar transistor, which determines an effective input capacitance of said common-emitter bipolar transistor, is defined by C.

Claim 12

A bipolar transistor gain cell having low input and output losses at microwave frequencies due to input and output attenuation compensation, comprising: an input; a first bipolar transistor having a base, a collector, and an emitter, wherein said base is coupled to said input; a second bipolar transistor having a base, a collector and an emitter, wherein said emitter of said first bipolar transistor is coupled to said base of said second bipolar transistor; a third bipolar transistor connected to said second bipolar transistor in a cascode configuration; and an output coupled to a collector of said third bipolar transistor; wherein the equivalent circuit of said first bipolar transistor defines the right hand side of the following relationship: ##EQU10## wherein R.sub.π is a first parasitic resistance, C.sub.π is an input capacitance, β o is an ac beta at low frequencies, R b is a second parasitic resistance, R e ms a third parasitic resistance, and wherein the size and bias of said common-emitter bipolar transistor, which determines an effective input capacitance of said common-emitter bipolar transistor, is defined by C.

Claim 13

The bipolar transistor gain cell of claim 10 wherein said first, second and third bipolar transistors are hetero-junction bipolar technology transistors.

Claim 14

The bipolar transistor gain cell of claim 10 further comprising: a first bias resistor having one end coupled to said base of said second bipolar transistor and an opposite end coupled to ground.

Claim 15

The bipolar transistor gain cell of claim 12 wherein said first bias resistor provides a current sink for said first bipolar transistor.

Claim 16

The bipolar transistor gain cell of claim 10 further comprising: feedback means coupled to at least one of a base and a collector of said third bipolar transistor for stabilizing said second bipolar transistor and said third bipolar transistor.

Claim 17

The bipolar transistor gain cell of claim 14 wherein said feedback means includes a feedback resistor having a first end coupled to said collector of said third bipolar transistor and an opposite end coupled to said base of said third bipolar transistor.

Claim 18

The bipolar transistor, gain cell of claim 15 wherein said feedback means further includes a second bias resistor having a first end coupled to said base of said third bipolar transistor and an opposite end coupled to ground.

Claim 19

The bipolar transistor gain cell of claim 16 wherein said second bias resistor provides partial voltage bias to said base of said third bipolar transistor.

Claim 20

The bipolar transistor gain cell of claim 16 wherein said feedback means further includes: a biasing capacitor having one end coupled so said base of said third bipolar transistor; and a third bias resistor having one end coupled to an opposite end of said biasing capacitor and an opposite end coupled to ground.

Claim 21

The bipolar transistor gain cell of claim 18 wherein said biasing capacitor and said third bias resistor bypass said base of said third bipolar transistor to allow common base operation, and wherein said third bias resistor provides impedance at said base of said third bipolar transistor to allow said feedback resistor to provide negative feedback.

Claim 22

The bipolar transistor gain cell of claim 10 wherein said collector of said first bipolar transistor is coupled to a voltage source.

Claim 23

The bipolar transistor gain cell of claim 10 further comprising: a fourth bipolar transistor having an emitter coupled to said base of said first bipolar transistor and a collector coupled to a voltage source.

Claim 24

The bipolar transistor gain cell of claim 21 further comprising: a base resistor having one end coupled to a base of said fourth bipolar transistor and an opposite end coupled to a predetermined voltage.

Claim 25

The bipolar transistor gain cell of claim 22 further comprising: a fourth bias resistor having one end coupled to said base of said first bipolar transistor and an opposite end coupled to ground.

Claim 26

A bipolar transistor gain cell distributed amplifier which operates at microwave frequencies comprising: first, second, and output transmission lines; and first, second, third and fourth bipolar transistor gain cells having low input and output losses at microwave frequencies due to input and output attenuation compensation at said gain cells, each including an input and an output, a first, second and third bipolar transistor each having a base, a collector and an emitter, wherein said input is coupled to said base of said first bipolar transistor, said second and said third bipolar transistor are connected in a cascode configuration, said emitter of said first bipolar transistor is coupled to said base of said second bipolar transistor, and said output is coupled to said collector of said third bipolar transistor; wherein components of the equivalent circuit of said first bipolar transistor define the right hand side of the following relationship: ##EQU11## wherein R.sub.π is a first parasitic resistance, C.sub.π is an input capacitance, β o is an ac beta at low frequencies R b is a second parasitic resistance, R e is a third parasitic resistance, and wherein the size and bias of said common-emitter bipolar transistor, which determines an effective input capacitance of said common-emitter bipolar transistor, is defined by C; wherein said inputs of said first and third bipolar transistor gain cells are coupled to said first transmission line, and said inputs of said second and fourth bipolar transistor gain cells are coupled to said second transmission line; and wherein said outputs of said first, second, third and fourth bipolar transistor gain cells are connected to said output transmission line.

Claim 27

A bipolar transistor gain cell distributed amplifier which operates at microwave frequencies comprising: first, second, and output transmission lines; and first, second, third and fourth bipolar transistor gain cells having low input and output losses at microwave frequencies due to input and output attenuation compensation at said gain cells, each including an input and an output, a first, second and third bipolar transistor each having a base, a collector and an emitter, wherein said input is coupled to said base of said first bipolar transistor, said second and said third bipolar transistor are connected in a cascode configuration, said emitter of said first bipolar transistor is coupled to said base of said second bipolar transistor, and said output is coupled to said collector of said third bipolar transistor; wherein components of the equivalent circuit of said first bipolar transistor define the right hand side of the following relationship: ##EQU11## wherein R.sub.π is a first parasitic resistance, C.sub.π is an input capacitance, β o is an ac beta at low frequencies R b is a second parasitic resistance, R e is a third parasitic resistance, and wherein the size and bias of said common-emitter bipolar transistor, which determines an effective input capacitance of said common-emitter bipolar transistor, is defined by C; wherein said inputs of said first and third bipolar transistor gain cells are coupled to said first transmission line, and said inputs of said second and fourth bipolar transistor gain cells are coupled to said second transmission line; and wherein said outputs of said first, second, third and fourth bipolar transistor gain cells are connected to said output transmission line.

Claim 28

The bipolar transistor gain cell distributed amplifier of claim 24 wherein said first, second, third and fourth bipolar transistor gain cells include: a first bias resistor having one end coupled to said base of said second bipolar transistor and an opposite end of said first bias resistor is coupled to ground.

Claim 29

The bipolar transistor gain cell distributed amplifier of claim 24 wherein said first, second, third and fourth bipolar transistor gain cells include: a feedback resistor having one end coupled to said collector of said third bipolar transistor and opposite end coupled to said base of said third bipolar transistor.

Claim 30

The bipolar transistor gain cell distributed amplifier of claim 24 wherein said first, second, third and fourth bipolar transistor gain cells include: a second bias resistor having one end coupled to said base of said third bipolar transistor and an opposite end coupled to ground.

Claim 31

The bipolar transistor gain cell distributed amplifier of claim 24 wherein said first, second, third and fourth bipolar transistor gain cells include: a biasing capacitor having one end coupled to said base of said third bipolar transistor; and a third bias resistor having one end coupled to an opposite end of said biasing capacitor and an opposite end coupled to ground.

Claim 32

The bipolar transistor gain cell distributed amplifier of claim 24 wherein said first, second, third and fourth bipolar transistor gain cells include: a fourth bipolar transistor having a base, an emitter and a collector, wherein said emitter of said fourth bipolar transistor is coupled to said base of said first bipolar transistor.

Claim 33

The bipolar transistor gain cell distributed amplifier of claim 29 wherein said first, second, third and fourth bipolar transistor gain cells include: a base resistor having one end coupled to said base of said fourth bipolar transistor and an opposite and coupled to a predetermined voltage.

Claim 34

The bipolar transistor gain cell distributed amplifier of claim 30 wherein said first, second, third and fourth bipolar transistor gain cells include: a fourth bias resistor having one end coupled to said base of said first bipolar transistor and an opposite end coupled to ground.