Patent US5554266A successfully refreshed from Google Patents.
US5554266A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Semiconductor device manufacturing apparatus
Assignee: Toshiba Corp
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Filing: 1995-06-02
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Granted: 1996-09-10
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Expires: 2015-06-02
Abstract
Abstract In a semiconductor device manufacturing apparatus having a holder for holding a semiconductor wafer to be processed within a reaction vessel, the holder is provided with a separator for preventing ends of the semiconductor wafer from being brought into contact with the holder. Further, in a semiconductor device manufacturing apparatus having a holder functioning as a cathode, for holding a semiconductor wafer to be processed; an anode provided on the semiconductor wafer side so as to be opposed to the holder; a plurality of magnets arranged in the vicinity of the anode, for generating magnetic force lines on a surface of the anode; and a section for applying a high voltage between the anode and the cathode to generate an electric field so that plasma can be generated at intersectional portions between the generated magnetic force lines and the generated electric field, the apparatus further includes a separator provided for the holder, for preventing ends of the semiconductor wafer to be processed from being brought into contact with the holder. The separator provided for the holder is a stepped portion or a recessed portion formed on the holder.
Inventors
- 👤 Rintarou Okamoto
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-09 05:26
CPC Classifications
C; C23; C23C; C23C14/00; C23C14/22; C23C14/50; H; H01; H01J; H01J37/00; H01J37/32; H01J37/32009; H01J37/32082; H01J37/32431; H01J37/32532; H01J37/32541; H01J37/3266; H10; H10P; H10P72/00; H10P72/70; H10P72/76; H10P72/7604; H10P72/7616
Claims Analysis
Total Claims: 4
Claim 1
Independent Claim
131 words
A semiconductor device manufacturing apparatus for processing a semiconductor wafer housed in a reaction vessel, the apparatus comprising: a support base with a substantially flat surface; an insulative holding member disposed on top of and extending an entire length of the substantially flat surface of the support base, for holding the semiconductor wafer, the support base and the insulative holding member being housed in the reaction vessel, wherein an area of the insulative holding member facing the semiconductor wafer is larger than an area of the semiconductor wafer and the insulative holding member is provided with a stepped portion for preventing ends of the semiconductor wafer from being brought into contact with the insulative holding member, and wherein the portion of the support base facing the semiconductor wafer is substantially level.
Claim 2
Dependent Claim
131 words
A semiconductor device manufacturing apparatus for processing a semiconductor wafer housed in a reaction vessel, the apparatus comprising: a support base with a substantially flat surface; an insulative holding member disposed on top of and extending an entire length of the substantially flat surface of the support base, for holding the semiconductor wafer, the support base and the insulative holding member being housed in the reaction vessel, wherein an area of the insulative holding member facing the semiconductor wafer is larger than an area of the semiconductor wafer and the insulative holding member is provided with a stepped portion for preventing ends of the semiconductor wafer from being brought into contact with the insulative holding member, and wherein the portion of the support base facing the semiconductor wafer is substantially level.
Claim 3
Dependent Claim
229 words
A semiconductor device manufacturing apparatus for processing a semiconductor wafer housed in a reaction vessel, the apparatus comprising: a support base with a substantially flat surface functioning as a cathode; an insulative holding member disposed on top of and extending an entire length of the substantially flat surface of the support base, for holding the semiconductor wafer, the support base and the insulative holding member being housed in the reaction vessel; an anode provided on the semiconductor wafer side so as to be opposed to the holding member; a plurality of magnets arranged in the vicinity of the anode, for generating magnetic force on a surface of the anode, the support base and the insulating holding member, the anode and the magnets being housed in the reaction vessel; and means for applying a high voltage between the anode and the cathode to generate an electric field so that plasma can be generated at intersectional portions between the generated magnetic force and the generated electric field, wherein an area of the insulative holding member facing the semiconductor wafer is larger than an area of the semiconductor wafer and the insulative holding member is provided with a stepped portion for preventing ends of the semiconductor wafer from being brought into contact with the insulative holding member, and wherein the portion of the support base facing the semiconductor wafer is substantially level.
Claim 4
Dependent Claim
229 words
A semiconductor device manufacturing apparatus for processing a semiconductor wafer housed in a reaction vessel, the apparatus comprising: a support base with a substantially flat surface functioning as a cathode; an insulative holding member disposed on top of and extending an entire length of the substantially flat surface of the support base, for holding the semiconductor wafer, the support base and the insulative holding member being housed in the reaction vessel; an anode provided on the semiconductor wafer side so as to be opposed to the holding member; a plurality of magnets arranged in the vicinity of the anode, for generating magnetic force on a surface of the anode, the support base and the insulating holding member, the anode and the magnets being housed in the reaction vessel; and means for applying a high voltage between the anode and the cathode to generate an electric field so that plasma can be generated at intersectional portions between the generated magnetic force and the generated electric field, wherein an area of the insulative holding member facing the semiconductor wafer is larger than an area of the semiconductor wafer and the insulative holding member is provided with a stepped portion for preventing ends of the semiconductor wafer from being brought into contact with the insulative holding member, and wherein the portion of the support base facing the semiconductor wafer is substantially level.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1999-09-10 | 2000-03-11 | 2000-09-10 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2003-09-10 | 2004-03-11 | 2004-09-10 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2007-09-10 | 2008-03-11 | 2008-09-10 | $7700.00 | Window Closed / Lapsed |