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US5550868A
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US
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π/4-DQPSK delay spread detection and compensation apparatus and method
Assignee: Nokia of America Corp
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Filing: 1994-03-03
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Granted: 1996-08-27
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Expires: 2014-03-03
Abstract
Abstract A π/4 delay spread detection and compensation arrangement effectively detects distortion due to multipath delay spread in a digital channel and compensates for this distortion with minimum circuit complexity. An improvement in the bit error rate performance for a differential detector in the receiver is achieved through use of a detected direct current (DC) component, which is proportional to the amount of multipath delay spread on the digital channel. This DC component is used in the differential detector for compensating for this delay spread. In addition, the differential detector also provides a channel quality measure of the level of delay spread on the digital channel for use by the receiver in selecting either the differential detector or an equalizer for decoding of the data on the digital channel. When the level of delay spread is low, a processor used by the equalizer is freed for other computational tasks or, when the bit error rate permits, is not used at all thereby realizing a reduction in power consumption in the receiver.
Inventors
- 👤 Joseph Boccuzzi
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-29 10:38
CPC Classifications
H; H04; H04L; H04L27/00; H04L27/18; H04L27/22
Claims Analysis
Total Claims: 18
Claim 1
Independent Claim
104 words
A digital wireless receiver arranged for decoding digital signals on a multipath delay spread digital channel, the receiver comprising: differential detector circuit means for decoding the digital signals on the channel; means for detecting a direct current (DC) component signal produced in the differential detector circuit means, the level of said DC component signal being proportional to the amount of multipath delay spread on the digital channel; and compensating means for removing said DC component signal, said compensating means being responsive to the detecting means for providing compensation to the differential detector circuit means for compensating for the multipath delay spread on the channel.
Claim 2
Dependent Claim
104 words
A digital wireless receiver arranged for decoding digital signals on a multipath delay spread digital channel, the receiver comprising: differential detector circuit means for decoding the digital signals on the channel; means for detecting a direct current (DC) component signal produced in the differential detector circuit means, the level of said DC component signal being proportional to the amount of multipath delay spread on the digital channel; and compensating means for removing said DC component signal, said compensating means being responsive to the detecting means for providing compensation to the differential detector circuit means for compensating for the multipath delay spread on the channel.
Claim 3
Dependent Claim
18 words
The digital wireless receiver as in claim 1 wherein the differential detector circuit means includes a non-coherent detector.
Claim 4
Dependent Claim
26 words
The digital wireless receiver as in claim 2 wherein the detecting means comprises a moving average unit for estimating the level of the DC component signal.
Claim 5
Dependent Claim
31 words
The digital wireless receiver as in claim 3 wherein the compensating means includes subtracter means for removing the DC component signal from an in-phase output signal provided by the non-coherent detector.
Claim 6
Dependent Claim
145 words
A digital wireless receiver arranged for decoding digital signals on a multipath delay spread digital channel, the receiver comprising: differential detector circuit means for decoding the digital signals on the channel; equalizer circuit means for decoding the digital signals on the channel; a moving average unit for detecting a direct current (DC) component signal produced in the differential detector circuit means, the level of said DC component signal being proportional to the amount of multipath delay spread on the digital channel; and means responsive to the moving average unit for selecting either the differential detector circuit means or the equalizer circuit means for decoding the digital signals on the channel, the selecting means selecting the differential detector circuit means when the DC component signal is below a predetermined level and selecting the equalizer circuit means when the DC component signal is above the predetermined level.
Claim 7
Dependent Claim
145 words
A digital wireless receiver arranged for decoding digital signals on a multipath delay spread digital channel, the receiver comprising: differential detector circuit means for decoding the digital signals on the channel; equalizer circuit means for decoding the digital signals on the channel; a moving average unit for detecting a direct current (DC) component signal produced in the differential detector circuit means, the level of said DC component signal being proportional to the amount of multipath delay spread on the digital channel; and means responsive to the moving average unit for selecting either the differential detector circuit means or the equalizer circuit means for decoding the digital signals on the channel, the selecting means selecting the differential detector circuit means when the DC component signal is below a predetermined level and selecting the equalizer circuit means when the DC component signal is above the predetermined level.
Claim 8
Dependent Claim
18 words
The digital wireless receiver as in claim 5 wherein the differential detector circuit means includes a non-coherent detector.
Claim 9
Dependent Claim
24 words
The digital wireless receiver as in claim 6 wherein the moving average unit includes means for estimating the level of the DC component signal.
Claim 10
Independent Claim
97 words
A method of decoding digital signals in a wireless receiver, the digital signals being received on a multipath delay spread digital channel, the method comprising the steps of: decoding in a differential detector circuit the digital signals on the channel; detecting a direct current (DC) component signal generated in the differential detector circuit, the level of said DC component signal being proportional to the amount of multipath delay spread on the digital channel; and providing compensation to the differential detector circuit in response to the detecting step for compensating for the multipath delay spread on the channel.
Claim 11
Independent Claim
97 words
A method of decoding digital signals in a wireless receiver, the digital signals being received on a multipath delay spread digital channel, the method comprising the steps of: decoding in a differential detector circuit the digital signals on the channel; detecting a direct current (DC) component signal generated in the differential detector circuit, the level of said DC component signal being proportional to the amount of multipath delay spread on the digital channel; and providing compensation to the differential detector circuit in response to the detecting step for compensating for the multipath delay spread on the channel.
Claim 12
Dependent Claim
23 words
The method of decoding digital signals in a wireless receiver as in claim 8 wherein the differential detector circuit includes a non-coherent detector.
Claim 13
Dependent Claim
29 words
The method of decoding digital signals in a wireless receiver as in claim 9 further including a moving average unit for estimating the level of the DC component signal.
Claim 14
Dependent Claim
35 words
The method of decoding digital signals in a wireless receiver as in claim 10 further including a subtracter circuit for removing the DC component signal from an in-phase output signal provided by the non-coherent detector.
Claim 15
Independent Claim
136 words
A method of decoding digital signals in a wireless receiver, the digital signals being received on a multipath delay spread digital channel, the method comprising the steps of: detecting in a moving average unit a direct current (DC) component signal generated in a differential detector circuit, the level of said DC component signal being proportional to the amount of multipath delay spread on the digital channel; providing both the differential detector circuit and an equalizer circuit for decoding the digital signals on the channel; and selecting responsive to the detecting step the differential detector circuit for decoding the digital signals on the channel when the DC component signal is below a predetermined level and selecting the equalizer circuit for decoding the digital signals on the channel when the DC component signal is above the predetermined level.
Claim 16
Independent Claim
136 words
A method of decoding digital signals in a wireless receiver, the digital signals being received on a multipath delay spread digital channel, the method comprising the steps of: detecting in a moving average unit a direct current (DC) component signal generated in a differential detector circuit, the level of said DC component signal being proportional to the amount of multipath delay spread on the digital channel; providing both the differential detector circuit and an equalizer circuit for decoding the digital signals on the channel; and selecting responsive to the detecting step the differential detector circuit for decoding the digital signals on the channel when the DC component signal is below a predetermined level and selecting the equalizer circuit for decoding the digital signals on the channel when the DC component signal is above the predetermined level.
Claim 17
Dependent Claim
23 words
The method of decoding digital signals in a wireless receiver as in claim 12 wherein the differential detector circuit includes a non-coherent detector.
Claim 18
Dependent Claim
32 words
The method of decoding digital signals in a wireless receiver as in claim 13 further including the step of estimating in said moving average unit the level of the DC component signal.
References Cited (Backward Citations)
US4035767A
Cited
US4151475A
Cited
US4878029A
Cited
US5230077A
Cited
US5159282A
Cited
US5214391A
Cited
US5283531A
Cited
US5202643A
Cited
US5202901A
Cited
US5283815A
Cited
US5263052A
Cited
US5222078A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1999-08-27 | 2000-02-26 | 2000-08-27 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2003-08-27 | 2004-02-26 | 2004-08-27 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2007-08-27 | 2008-02-26 | 2008-08-27 | $7700.00 | Window Closed / Lapsed |