US5202901A
Expired / Lapsed
US
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Digital discriminator for pulse shaped π/4 shifted differentially encoded quadrature phase shift keying
Assignee: Ericsson Inc
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Filing: 1991-05-21
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Granted: 1993-04-13
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Expires: 2011-05-21
Abstract
Abstract A digital radio receiver for synchronization of radiowave transmissions for digital and analog FM signals in TDMA systems such as cellular telephones uses a tangent type discriminator that minimizes the bit error rate. The digital discriminator employs A/D converter circuit that samples a received intermediate frequency (IF) signal, a sorter circuit that produces a predetermined number of samples to be used in the decoding, a sample and phase adjustment circuit that allows for a carrier phase adjustment and sample timing adjustment, a divider circuit that eliminates the need for a conventional limiter by causing a ratio of amplitudes to be processed instead of absolute signal amplitudes, an inverse tangent circuit that creates a decoded phase angle from the ratio, a delay circuit and a summer circuit that create a differential signal, a modulo-2π correction circuit that corrects for wrap-around errors about the real axis, an integrate and dump filter for summing up all phase angles pertaining to a single symbol, and a four-phase decoder circuit to decode the signal into a pair of bits. An adjustment circuit minimizes phase error between a reference sequence of symbols and the decoded symbols by simultaneously adjusting the sample timing and carrier phase adjustments. The digital discriminator also can decode conventional analog FM radio broadcasts by deactivating the IDF, the adjustment circuit, and SPA circuit, and bypassing the four-phase decoder.
Inventors
- 👤 Sandeep Chennakeshu
- 👤 Gary J. Saulnier
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-25 20:20
CPC Classifications
H; H04; H04L; H04L27/00; H04L27/18; H04L27/22; H04L27/233; H04L27/2338
Claims Analysis
Total Claims: 12
Claim 1
Independent Claim
413 words
In a receiver of a cellular telephone for receiving phase angles encoded in a received signal, a digital discriminator, said discriminator comprising: a) a heterodyne circuit for converting said received signal to an intermediate frequency (IF) signal; b) an analog to digital (A/D) converter circuit coupled to the heterodyne circuit for sampling said IF signal and for creating a digital output signal having a plurality of samples, each sample comprising a quadrature coefficient signal and an in-phase coefficient signal; c) a sorter circuit coupled to receive the digital signal from the A/D converter and provide a predetermined number of samples for decoding; d) means for producing an initial sample index; e) a sample and phase adjustment (SPA) circuit coupled to the sorter circuit for receiving the samples of the sorter circuit, coupled to the means for producing an initial sample index for receiving an initial sample timing index, for receiving a sample timing index, for selecting samples for decoding based upon the sample timing index, for receiving a carrier phase adjustment, and creating a set of output samples based upon the selected samples and carrier phase adjustment, each SPA output sample comprising a quadrature coefficient and an in-phase coefficient; f) a means for providing a set of relative phase angle samples from the set of output samples from the SPA circuit, the relative phase angle providing means coupled to the SPA circuit; g) a modulo-2π correction circuit coupled to the relative phase angle providing means for receiving the relative phase angle samples, for correcting for phase angles which wrap-around the real axis and for creating a set of corrected relative phase angle samples; h) an integrate and dump filter (IDF) coupled to the modulo-2π correction circuit for receiving the corrected relative phase angle samples and sum them over each symbol period, then creating an output signal from the sums, each sum representing a decoded phase angle for the current symbol; i) a four-phase decoder circuit coupled to the IDF circuit for receiving the decoded phase angle of the symbol and for decoding the angle into a pair of decoded bits; and j) an adjustment circuit coupled to receive the signal sent to the four-phase decoder circuit for calculating a decoding error between the decoded phase angle for each symbol in a preamble and a respective one of a predetermined set of phase angles stored by the adjustment circuit, and for adjusting the sample timing and carrier phase adjustment to minimize the decoding error.
Claim 2
Dependent Claim
413 words
In a receiver of a cellular telephone for receiving phase angles encoded in a received signal, a digital discriminator, said discriminator comprising: a) a heterodyne circuit for converting said received signal to an intermediate frequency (IF) signal; b) an analog to digital (A/D) converter circuit coupled to the heterodyne circuit for sampling said IF signal and for creating a digital output signal having a plurality of samples, each sample comprising a quadrature coefficient signal and an in-phase coefficient signal; c) a sorter circuit coupled to receive the digital signal from the A/D converter and provide a predetermined number of samples for decoding; d) means for producing an initial sample index; e) a sample and phase adjustment (SPA) circuit coupled to the sorter circuit for receiving the samples of the sorter circuit, coupled to the means for producing an initial sample index for receiving an initial sample timing index, for receiving a sample timing index, for selecting samples for decoding based upon the sample timing index, for receiving a carrier phase adjustment, and creating a set of output samples based upon the selected samples and carrier phase adjustment, each SPA output sample comprising a quadrature coefficient and an in-phase coefficient; f) a means for providing a set of relative phase angle samples from the set of output samples from the SPA circuit, the relative phase angle providing means coupled to the SPA circuit; g) a modulo-2π correction circuit coupled to the relative phase angle providing means for receiving the relative phase angle samples, for correcting for phase angles which wrap-around the real axis and for creating a set of corrected relative phase angle samples; h) an integrate and dump filter (IDF) coupled to the modulo-2π correction circuit for receiving the corrected relative phase angle samples and sum them over each symbol period, then creating an output signal from the sums, each sum representing a decoded phase angle for the current symbol; i) a four-phase decoder circuit coupled to the IDF circuit for receiving the decoded phase angle of the symbol and for decoding the angle into a pair of decoded bits; and j) an adjustment circuit coupled to receive the signal sent to the four-phase decoder circuit for calculating a decoding error between the decoded phase angle for each symbol in a preamble and a respective one of a predetermined set of phase angles stored by the adjustment circuit, and for adjusting the sample timing and carrier phase adjustment to minimize the decoding error.
Claim 3
Dependent Claim
180 words
The receiver of a cellular telephone of claim 1 wherein the means for providing a set of relative phase angle samples comprises: a) a divider circuit coupled to the SPA circuit for receiving each quadrature coefficient, and for dividing it by its corresponding in-phase coefficient to create output samples, each output sample representing a tangent of the signal phase angle; b) an inverse tangent circuit coupled to the divider circuit for receiving the tangents of the signal phase angle and create an output samples each representing a decoded phase angle for a tangent; c) a delay circuit coupled to the inverse tangent circuit for receiving and delaying the decoded phase angles until a subsequent phase angle is decoded; and d) a summer circuit coupled to the inverse tangent circuit and the delay circuit for receiving the output samples of the inverse tangent circuit, for receiving the output samples of the delay circuit, and subtract each output sample of the delay circuit from the corresponding output sample of the inverse tangent circuit to create a set of relative phase angle samples.
Claim 4
Dependent Claim
61 words
The receiver of claim 1 further comprising a predecoding summer coupled to receive the best carrier phase adjustments from the adjustment circuit and the output signal of the IDF and add the best carrier phase adjustment to each sample of the output signal of the IDF thereby compensating for decoding error in each sample to be decoded by the four-phase decoder.
Claim 5
Dependent Claim
21 words
The receiver of claim 1 wherein the A/D converter samples at a rate being at least four times the intermediate frequency.
Claim 6
Dependent Claim
63 words
The receiver of claim 2 wherein the adjustment circuit adjusts the sample timing index and carrier phase adjustment at the start of a frame to determine the best sample timing index and carrier phase adjustment, and once found, keeps the carrier phase adjustment constant and varies the sample timing adjustment during subsequent time slots, thereby allowing a frame/slot synchronization followed by symbol synchronization.
Claim 7
Dependent Claim
81 words
The receiver of claim 5 wherein the received signal is a conventional analog FM radio signal, a predetermined number of samples/symbol processed, the adjustment, SPA, and IDF circuits are deactivated so as to be non-functional, and the output signal of the modulo-2π correction circuit is coupled directly to an FM output, such that the output signal of the modulo-2π correction circuit bypasses the four-phase decoder and is passed directly to the FM output and constitutes a decoded conventional analog FM signal.
Claim 8
Independent Claim
299 words
A method of decoding a received radio signal comprising the steps of: a) receiving said signal; b) digitizing said received signal into samples each corresponding to an instant in time; c) performing a coarse synchronization between a selected set of samples and a predetermined preamble sequence to arrive at a coarse timing index and coarse phase angle; d) set a preamble error value to a substantially maximum positive value, an optimal timing index to the coarse timing index, and an optimal phase adjustment to zero; e) setting a carrier phase adjustment to a first value of a set of predetermined values; f) buffering a selected set of samples corresponding to time period straddling the coarse timing index; g) setting a sample timing index to a value being before the coarse timing index representing a first sample to be decoded; h) differentially decoding a predetermined number of samples to result in a decoded symbol, starting with a sample corresponding to the sample timing index and offset by the carrier phase adjustment; i) compare the decoded symbol to a corresponding symbol in the preamble sequence and accumulate an error; j) repeat steps "g"-"h" for the symbols corresponding to the predetermined preamble sequence; k) compare the accumulated error to the preamble error and if lower then: 1) set the optimal timing index to the sample timing index, 2) setting the optimal phase adjustment to the carrier phase adjustment, and 3) setting the preamble error to the accumulated error; l) incrementing the sample timing index and repeating steps "h"-"k" for a predetermined number of repetitions; m) incrementing the carrier phase adjustment and repeating steps "g"-"l" for a predetermined number of repetitions; and n) differentially decoding subsequent received signals using the optimal timing index and the optimal phase adjustment until another synchronization is required.
Claim 9
Independent Claim
299 words
A method of decoding a received radio signal comprising the steps of: a) receiving said signal; b) digitizing said received signal into samples each corresponding to an instant in time; c) performing a coarse synchronization between a selected set of samples and a predetermined preamble sequence to arrive at a coarse timing index and coarse phase angle; d) set a preamble error value to a substantially maximum positive value, an optimal timing index to the coarse timing index, and an optimal phase adjustment to zero; e) setting a carrier phase adjustment to a first value of a set of predetermined values; f) buffering a selected set of samples corresponding to time period straddling the coarse timing index; g) setting a sample timing index to a value being before the coarse timing index representing a first sample to be decoded; h) differentially decoding a predetermined number of samples to result in a decoded symbol, starting with a sample corresponding to the sample timing index and offset by the carrier phase adjustment; i) compare the decoded symbol to a corresponding symbol in the preamble sequence and accumulate an error; j) repeat steps "g"-"h" for the symbols corresponding to the predetermined preamble sequence; k) compare the accumulated error to the preamble error and if lower then: 1) set the optimal timing index to the sample timing index, 2) setting the optimal phase adjustment to the carrier phase adjustment, and 3) setting the preamble error to the accumulated error; l) incrementing the sample timing index and repeating steps "h"-"k" for a predetermined number of repetitions; m) incrementing the carrier phase adjustment and repeating steps "g"-"l" for a predetermined number of repetitions; and n) differentially decoding subsequent received signals using the optimal timing index and the optimal phase adjustment until another synchronization is required.
Claim 10
Dependent Claim
379 words
A digital discriminator of a cellular telephone comprising: a) an analog to digital (A/D) converter circuit coupled to the heterodyne circuit for sampling said IF signal and for creating a digital output signal having a plurality of samples, each sample comprising a quadrature coefficient signal and an in-phase coefficient signal; b) a sorter circuit coupled to receive the digital signal from the A/D converter and provide a predetermined number of samples for decoding; c) means for producing an initial sample index; d) a sample and phase adjustment (SPA) circuit coupled to the sorter circuit for receiving the samples of the sorter circuit, coupled to the means for producing an initial sample index for receiving an initial sample timing index for receiving a sample timing index, for selecting samples for decoding based upon the sample timing index, for receiving a carrier phase adjustment, and creating a set of output samples based upon the selected samples and carrier phase adjustment, each SPA output sample comprising a quadrature coefficient and an in-phase coefficient; e) a means for providing a set of relative phase angle samples from the set of output samples from the SPA circuit, the relative phase angle providing means coupled to the SPA circuit; f) a modulo-2π correction circuit coupled to the relative phase angle providing means for receiving the relative phase angle samples, for correcting for phase angles which wrap-around the real axis and for creating a set of corrected relative phase angle samples; g) an integrate and dump filter (DF) coupled to the modulo-2π correction circuit for receiving the corrected relative phase angle samples and sum them over each symbol period, then creating an an output signal from the sums, each sum representing a decoded phase angle for the current symbol; h) a four-phase decoder circuit coupled to the IDF circuit for receiving the decoded phase angle of the symbol and for decoding the angle into a pair of decoded bits; and i) an adjustment circuit coupled to the IDF circuit for calculating a decoding error between the decoded phase angle for each symbol in a preamble and a respective one of a predetermined set of phase angles stored by the adjustment circuit, and for adjusting the sample timing and carrier phase adjustment to minimize the decoding error.
Claim 11
Dependent Claim
379 words
A digital discriminator of a cellular telephone comprising: a) an analog to digital (A/D) converter circuit coupled to the heterodyne circuit for sampling said IF signal and for creating a digital output signal having a plurality of samples, each sample comprising a quadrature coefficient signal and an in-phase coefficient signal; b) a sorter circuit coupled to receive the digital signal from the A/D converter and provide a predetermined number of samples for decoding; c) means for producing an initial sample index; d) a sample and phase adjustment (SPA) circuit coupled to the sorter circuit for receiving the samples of the sorter circuit, coupled to the means for producing an initial sample index for receiving an initial sample timing index for receiving a sample timing index, for selecting samples for decoding based upon the sample timing index, for receiving a carrier phase adjustment, and creating a set of output samples based upon the selected samples and carrier phase adjustment, each SPA output sample comprising a quadrature coefficient and an in-phase coefficient; e) a means for providing a set of relative phase angle samples from the set of output samples from the SPA circuit, the relative phase angle providing means coupled to the SPA circuit; f) a modulo-2π correction circuit coupled to the relative phase angle providing means for receiving the relative phase angle samples, for correcting for phase angles which wrap-around the real axis and for creating a set of corrected relative phase angle samples; g) an integrate and dump filter (DF) coupled to the modulo-2π correction circuit for receiving the corrected relative phase angle samples and sum them over each symbol period, then creating an an output signal from the sums, each sum representing a decoded phase angle for the current symbol; h) a four-phase decoder circuit coupled to the IDF circuit for receiving the decoded phase angle of the symbol and for decoding the angle into a pair of decoded bits; and i) an adjustment circuit coupled to the IDF circuit for calculating a decoding error between the decoded phase angle for each symbol in a preamble and a respective one of a predetermined set of phase angles stored by the adjustment circuit, and for adjusting the sample timing and carrier phase adjustment to minimize the decoding error.
Claim 12
Dependent Claim
177 words
The digital discriminator of claim 8 wherein the means for providing a set of relative phase angle samples comprises: a) a divider circuit coupled to the SPA circuit for receiving each quadrature coefficient, and for dividing it by its corresponding in-phase coefficient to create output samples, each output sample representing a tangent of the signal phase angle; b) an inverse tangent circuit coupled to the divider circuit for receiving the tangents of the signal phase angle and create an output samples each representing a decoded phase angle for a tangent; c) a delay circuit coupled to the inverse tangent circuit for receiving and delaying the decoded phase angles until a subsequent phase angle is decoded; and d) a summer circuit coupled to the inverse tangent circuit and the delay circuit for receiving the output samples of the inverse tangent circuit, for receiving the output samples of the delay circuit, and subtract each output sample of the delay circuit from the corresponding output sample of the inverse tangent circuit to create a set of relative phase angle samples.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1996-04-12 | 1996-10-12 | 1997-04-13 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2000-04-12 | 2000-10-12 | 2001-04-13 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2004-04-12 | 2004-10-12 | 2005-04-13 | $7700.00 | Window Closed / Lapsed |