US5545922A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Dual sided integrated circuit chip package with offset wire bonds and support block cavities
Assignee: Intel Corp
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Filing: 1995-03-15
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Granted: 1996-08-13
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Expires: 2015-03-15
Abstract
Abstract A method is disclosed for constructing a dual-sided chip package onto a leadframe having a die pad and a set of lead fingers corresponding to the die pad. Integrated circuit dies are disposed onto each side of the die pad while the leadframe is supported with support blocks having cavities that accept the integrated circuit dies and that support each lead finger and that provide clearance for stitch bonds of the previously formed wire bonds. Thereafter, a one step plastic mold is formed around each assembly comprising the dual integrated circuit dies, the die pads, and the wire bonds.
Inventors
- 👤 Suresh V. Golwalkar
- 👤 Richard Foehringer
- 👤 Michael Wentling
- 👤 Ryo Takatsuki
- 👤 Shigeo Kawashima
- 👤 Keiichi Tsujimoto
- 👤 Nobuaki Sato
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-04 05:15
CPC Classifications
H; H10; H10W; H10W90/00; H10W90/811; H10W72/00; H10W72/01; H10W72/0198; H10W72/071; H10W72/0711; H10W72/07178; H10W72/073; H10W72/075; H10W72/50; H10W72/531; H10W72/536; H10W72/5363; H10W72/541; H10W72/5449; H10W72/551; H10W72/552; H10W72/5522; H10W72/851; H10W72/874; H10W72/884; H10W74/00; H10W90/701; H10W90/731; H10W90/736; H10W90/751; H10W90/756; H10W99/00; Y; Y10; Y10T; Y10T29/00; Y10T29/49; Y10T29/49002; Y10T29/49117; Y10T29/49121
Claims Analysis
Total Claims: 4
Claim 1
Independent Claim
257 words
A dual-sided integrated circuit package, comprising: (A) a leadframe having a die pad and a set of lead fingers corresponding to the die pad, wherein the leadframe has a first side and a second side; (B) a first integrated circuit die disposed onto the die pad on the first side of the leadframe; (C) a second integrated circuit die disposed onto the die pad on the second side of the leadframe while the leadframe is supported by a support block having a cavity that accepts the first integrated circuit die; (D) a first set of wire bonds that bond the first integrated circuit die to the lead fingers on the first side of the leadframe while the leadframe is supported by a support block having a cavity that accepts the second integrated circuit die and that supports an end of each of the lead fingers; (E) a second set of wire bonds that bond the second integrated circuit die to the lead fingers on the second side of the leadframe while the leadframe is supported by a support block having a cavity that accepts the first integrated circuit die and the first set of wire bonds and that supports each of the lead fingers while providing clearance for a stitch bond of each of the first set of wire bonds on the first side of the leadframe, wherein each of the second set of wire bonds is offset away from an end of each of the lead fingers in relation to the first set of wire bonds.
Claim 2
Dependent Claim
257 words
A dual-sided integrated circuit package, comprising: (A) a leadframe having a die pad and a set of lead fingers corresponding to the die pad, wherein the leadframe has a first side and a second side; (B) a first integrated circuit die disposed onto the die pad on the first side of the leadframe; (C) a second integrated circuit die disposed onto the die pad on the second side of the leadframe while the leadframe is supported by a support block having a cavity that accepts the first integrated circuit die; (D) a first set of wire bonds that bond the first integrated circuit die to the lead fingers on the first side of the leadframe while the leadframe is supported by a support block having a cavity that accepts the second integrated circuit die and that supports an end of each of the lead fingers; (E) a second set of wire bonds that bond the second integrated circuit die to the lead fingers on the second side of the leadframe while the leadframe is supported by a support block having a cavity that accepts the first integrated circuit die and the first set of wire bonds and that supports each of the lead fingers while providing clearance for a stitch bond of each of the first set of wire bonds on the first side of the leadframe, wherein each of the second set of wire bonds is offset away from an end of each of the lead fingers in relation to the first set of wire bonds.
Claim 3
Dependent Claim
32 words
The dual-sided integrated circuit package of claim 1, wherein the die pad includes a set of extension areas located peripherally beyond die attach areas for the first and second integrated circuit dies.
Claim 4
Dependent Claim
45 words
The dual-sided integrated circuit package of claim 2, wherein the extension areas include a set of guide pin holes that are located on peripheral areas on opposite ends of the die pad beyond the die attach areas for the first and second integrated circuit dies.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1999-08-13 | 2000-02-12 | 2000-08-13 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2003-08-13 | 2004-02-12 | 2004-08-13 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2007-08-13 | 2008-02-12 | 2008-08-13 | $7700.00 | Window Closed / Lapsed |