Process for fabricating refractory-metal silicide layers in a semiconductor device

Claim 2

A process for fabricating a semiconductor device comprising the steps of: providing a semiconductor substrate having an active region therein and a gate dielectric layer overlying the active region; forming a first polycrystalline silicon layer overlying the gate dielectric layer; etching the first polycrystalline silicon layer and the gate dielectric layer to define a patterned layer; forming a diffusion barrier layer overlying the patterned layer; forming a second polycrystalline silicon layer overlying the diffusion barrier layer; and converting the second polycrystalline silicon layer to a refractory-metal silicide layer, wherein the diffusion barrier layer prevents formation of refractory-metal silicide in the first polycrystalline silicon layer.

Claim 3

The process of claim 1 further comprising the steps of: sequentially etching the refractory-metal silicide layer, the diffusion barrier layer, and the patterned layer to form a gate electrode overlying the active region; forming dielectric sidewall spacers adjacent to the gate electrode; and forming source and drain regions in the active region on either side of the gate electrode.

Claim 4

The process of claim 1 wherein the step of converting comprises the steps of: depositing a layer of refractory-metal overlying the second polycrystalline silicon layer; and applying thermal energy to initiate a reaction between the refractory-metal and the second polycrystalline silicon layer.

Claim 5

The process of claim 1 wherein the step of forming a diffusion barrier comprises depositing a material selected from the group consisting of titanium nitride, boron nitride, and a bilayer of titanium and titanium nitride.

Claim 6

A process for fabricating a semiconductor device comprising the steps of: providing a semiconductor substrate having a first and second active regions therein, and a gate dielectric layer overlying the first and second active regions; forming a first polycrystalline silicon layer overlying the gate dielectric layer; etching the first polycrystalline silicon layer and the gate dielectric layer to define a patterned layer and to expose a contact region at the first active region; forming a diffusion barrier layer overlying the patterned layer and the contact region; forming a second polycrystalline silicon layer overlying the diffusion barrier layer; converting the second polycrystalline silicon layer to a refractory-metal silicide layer, wherein the diffusion barrier layer prevents formation of refractory-metal silicide in the first polycrystalline silicon layer and in the semiconductor substrate; and sequentially etching the second polycrystalline silicon layer, the diffusion barrier layer, and the patterned layer to form a gate electrode at the second active region and a buried contact structure at the first active region.

Claim 7

A process for fabricating a semiconductor device comprising the steps of: providing a semiconductor substrate having a first and second active regions therein, and a gate dielectric layer overlying the first and second active regions; forming a first polycrystalline silicon layer overlying the gate dielectric layer; etching the first polycrystalline silicon layer and the gate dielectric layer to define a patterned layer and to expose a contact region at the first active region; forming a diffusion barrier layer overlying the patterned layer and the contact region; forming a second polycrystalline silicon layer overlying the diffusion barrier layer; converting the second polycrystalline silicon layer to a refractory-metal silicide layer, wherein the diffusion barrier layer prevents formation of refractory-metal silicide in the first polycrystalline silicon layer and in the semiconductor substrate; and sequentially etching the second polycrystalline silicon layer, the diffusion barrier layer, and the patterned layer to form a gate electrode at the second active region and a buried contact structure at the first active region.

Claim 8

The process of claim 5, wherein the step of converting comprises the steps of: depositing a layer of refractory-metal overlying the second polycrystalline silicon layer; and applying thermal energy to initiate a reaction between the refractory-metal and the second polycrystalline silicon layer.

Claim 9

A process for fabricating a semiconductor device comprising the steps of: providing a semiconductor substrate having an active region therein and a gate dielectric layer overlying the active region; forming a first polycrystalline silicon layer overlying the gate dielectric layer; forming a diffusion barrier layer overlying the first polycrystalline silicon layer; forming a second polycrystalline silicon layer overlying the diffusion barrier layer; and converting the second polycrystalline silicon layer to a refractory-metal silicide layer, wherein the diffusion barrier layer prevents the formation of refractory-metal silicide in the first polycrystalline silicon layer; sequentially etching the refractory-metal silicide layer, the diffusion barrier layer, and the first polycrystalline silicon layer to form a gate electrode, wherein an end-point signal is detected upon exposure of the diffusion barrier layer during the sequentially etching.

Claim 10

A process for fabricating a semiconductor device comprising the steps of: providing a semiconductor substrate having an active region therein and a gate dielectric layer overlying the active region; forming a first polycrystalline silicon layer overlying the gate dielectric layer; forming a diffusion barrier layer overlying the first polycrystalline silicon layer; forming a second polycrystalline silicon layer overlying the diffusion barrier layer; and converting the second polycrystalline silicon layer to a refractory-metal silicide layer, wherein the diffusion barrier layer prevents the formation of refractory-metal silicide in the first polycrystalline silicon layer; sequentially etching the refractory-metal silicide layer, the diffusion barrier layer, and the first polycrystalline silicon layer to form a gate electrode, wherein an end-point signal is detected upon exposure of the diffusion barrier layer during the sequentially etching.

Claim 11

The process of claim 7 wherein the step of forming a diffusion barrier comprises depositing a material selected from the group consisting of titanium nitride, boron nitride, and a bilayer of titanium and titanium nitride.