EP0337481A2
Expired / Lapsed
EP
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Semiconductor device
Assignee: Toshiba Corp
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Filing: 1989-04-14
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Granted: —
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Expires: 2009-04-14
Abstract
Abstract A semiconductor device includes a first polysilicon layer (17B) containing n-type impurity, a second polysilicon layer (17A) containing p-type impurity, and TiSi₂ layer (19). In the semiconductor device, the top surfaces of the first and second polysilicon layers (17B and 17A) are covered with an TiN layer (18) having a smaller diffusion coefficient of n-type impurity than the TiSi₂ layer (19) and the top surface of the TiN layer (18) is covered with the TiSi₂ layer (19).
Inventors
- 👤 Masaaki C/O Intellectual Property Div. Kinugawa
Bibliographic Details
Application Number
—
Jurisdiction
EP
Data Source
google_patents
Last Synchronized
2026-10-29 09:09
CPC Classifications
H; H10; H10D; H10D84/00; H10D84/80; H10D84/82; H10D84/83; H10D84/85; H10D84/857; H10D84/01; H10D84/0123; H10D84/0126; H10D84/0135; H10D64/00; H10D64/01; H10D64/013; H10D64/01302; H10D64/01304; H10D64/01306; H10D64/01308; H10D64/20; H10D64/27; H10D64/311; H10D64/411; H10D64/511; H10D64/60; H10D64/62
Claims Analysis
Total Claims: 9
Claim 1
Independent Claim
89 words
A semiconductor device comprising: a first polysilicon layer (17B) containing n-type impurity; a second polysilicon layer (17A) containing p-type impurity; and a silicide layer (19); characterized in that said semiconductor device further comprises a conductive layer (18) formed to cover the top surfaces of said first and second polysilicon layers (17B, 17A), said silicide layer (19) is formed to cover the top surface of said conductive layer (18), and the diffusion coefficient of the n-type impurity is smaller in said conductive layer (18) than in said silicide layer (19).
Claim 2
Dependent Claim
89 words
A semiconductor device comprising: a first polysilicon layer (17B) containing n-type impurity; a second polysilicon layer (17A) containing p-type impurity; and a silicide layer (19); characterized in that said semiconductor device further comprises a conductive layer (18) formed to cover the top surfaces of said first and second polysilicon layers (17B, 17A), said silicide layer (19) is formed to cover the top surface of said conductive layer (18), and the diffusion coefficient of the n-type impurity is smaller in said conductive layer (18) than in said silicide layer (19).
Claim 3
Dependent Claim
26 words
A semiconductor device according to claim 1, characterized in that said second polysilicon layer (17A) serves as a gate electrode of a p-channel MOS transistor (14A).
Claim 4
Dependent Claim
26 words
A semiconductor device according to claim 2, characterized in that said first polysilicon layer (17B) serves as a gate electrode of an n-channel MOS transistor (14B).
Claim 5
Dependent Claim
26 words
A semiconductor device according to claim 1, characterized in that said second polysilicon layer (17A) serves as a contact electrode formed on a p-type semiconductor region.
Claim 6
Dependent Claim
28 words
A semiconductor device according to claim 1, characterized in that said first and second polysilicon layers (17B, 17A) have edge surfaces which are in contact with each other.
Claim 7
Dependent Claim
27 words
A semiconductor device according to claim 1, characterized in that said silicide film (19) is formed of TiSi₂, and said conductive layer (18) is formed of TiN.
Claim 8
Dependent Claim
85 words
A semiconductor device comprising: a first polysilicon layer (17B) containing n-type impurity; a second polysilicon layer (17A) containing p-type impurity; and first and second silicide layers (19B, 19A) separately formed to cover the top surfaces of the first and second polysilicon layers (17B, 17A); characterized by further comprising a conductive layer (18) having a smaller diffusion coefficient of n-type impurity than said first and second silicide layers (19B, 19A) and formed to cover the top surfaces of said first and second silicide layers (19B, 19A).
Claim 9
Dependent Claim
85 words
A semiconductor device comprising: a first polysilicon layer (17B) containing n-type impurity; a second polysilicon layer (17A) containing p-type impurity; and first and second silicide layers (19B, 19A) separately formed to cover the top surfaces of the first and second polysilicon layers (17B, 17A); characterized by further comprising a conductive layer (18) having a smaller diffusion coefficient of n-type impurity than said first and second silicide layers (19B, 19A) and formed to cover the top surfaces of said first and second silicide layers (19B, 19A).
References Cited (Backward Citations)
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