Non-volatile semiconductor memory device and method for erasure and production thereof

Claim 1

A semiconductor memory device comprising: a semiconductor substrate of a first conductivity type; a plurality of memory cells, each of said memory cells including source and drain regions, of second conductive type opposite to said first conductivity type selectively formed in said semiconductor substrate to define a channel region therebetween, a first gate insulating layer disposed on said channel region, a first gate electrode disposed on said first gate insulating layer, a second gate insulating layer disposed on said first gate electrode, a second gate electrode disposed on said second gate insulating layer, first and second regions of said first conductivity type having an impurity concentration higher than that of said semiconductor substrate and selectively formed in said channel region in contact respectively with said source and drain regions; first means for performing on a selected one of said memory cells a data programming operation of applying first and second positive voltages respectively to said second gate electrode and said drain region while applying a reference voltage to said source region and said semiconductor substrate to thereby inject carriers into said first gate electrode, and second means for performing on said selected one of said memory cells a data erasing operation of applying said reference voltage to said semiconductor substrate, applying a third positive voltage to said second gate electrode, bringing said drain region into an open state, and applying a fourth positive voltage to said source region so that an avalanche breakdown occurs between said source region and said first region and hot carriers generated by said avalanche breakdown are injected into said first gate electrode.