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EP0446893A1 Expired / Lapsed EP ⏱️ 0.0 years remaining

Method of manufacturing semiconducting devices having floating gates

Assignee: Toshiba Corp
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Filing: 1991-03-13
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Granted: —
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Expires: 2011-03-13
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Abstract

Abstract The invention provides a novel method of manufacturing a semiconductor device comprising those sequential steps including the following, formation of a floating gate electrode (25) on a region predetermined for the formation of the first conductive channel across an insulation film (24), followed by superimposition of a control gate electrode (27) on the floating gate electrode (25) across another insulation film (26). After completing the formation of the stacked gate electrode unit, the first conductive impurities are injected into silicone substrate by applying a minimum of 8 degrees of angle against the normal of this substrate under aid of ionic injection, and then forms a region (40b) containing strong density of the first conductive impurities adjacent to the boundary of a layer of diffused second conductive impurities which is at least predetermined to become the drain region (41b) of the transistor incorporating the stacked gate electrode unit. As a result of the provision of the region (40b) containing strong density of impurities injected in the oblique direction, the efficiency in the writing of data into the floating gate electrode (25) is significantly promoted, and at the same time occurrence of "short-channel" effect can securely be suppressed as well.

Inventors

  • 👤 Eiji C/O Intellectual Property Division Sakagami

Bibliographic Details

Application Number —
Jurisdiction EP
Data Source google_patents
Last Synchronized 2026-10-29 03:49
CPC Classifications
H; H10; H10D; H10D62/00; H10D62/10; H10D62/13; H10D62/149; H10D62/151; H10D30/00; H10D30/01; H10D30/021; H10D30/0411; H10D62/17; H10D62/213; H10D62/221; H10D62/235; H10D62/299; H10D62/307; H10P; H10P30/00; H10P30/20; H10P30/22; H10P30/221; H10P30/222; H10B; H10B69/00

Claims Analysis

Total Claims: 9
Claim 1
Independent Claim 145 words
A method of manufacturing a semiconductor device comprising the steps of; forming a floating gate electrode (25) on an insulation film (24) formed on a layer, said floating gate electrode located above that region of the layer in which a first conductivity type channel is to be formed, and forming a control gate (27) on another insulation film (26) formed on the floating gate electrode; and injecting ions of an impurity having a first conductivity type into a semiconductor substrate (21) at an angle of at least 8° to the normal to the substrate, thereby to form a region (40b) having a high concentration of the first conductivity type impurity, in the vicinity of a boundary a diffusion layer which contains an impurity of a second conductivity type and which is to form a drain region (41b) of a transistor having said control gate electrode.
Claim 2
Dependent Claim 64 words
The method according to claim 1, characterized in that said step of injecting the impurity ions comprises a step of forming a region (40a) having a high concentration of the first conductivity type impurity, in the vicinity of a boundary a diffusion layer which contains an impurity of the second conductivity type and which is to form a source region (41a) of the transistor.
Claim 3
Dependent Claim 61 words
The method of manufacturing the semiconductor device according to claim 1 or 2, characterized by further comprising a step of injecting said impurities into said region by applying specific density which is stronger than that is held in the center of the channel region (46) of said transistor and weaker than that is held in the drain region of said transistor.
Claim 4
Dependent Claim 31 words
The method of manufacturing the semiconductor device according to claim 1 or 2, characterized in that said process for injecting ion into substrate is executed by continuously rotating said semiconductor substrate.
Claim 5
Dependent Claim 31 words
The method of manufacturing the semiconductor device according to claim 1 or 2, characterized in that said process for injecting ion into said substrate is executed by intermittently rotating said substrate.
Claim 6
Dependent Claim 42 words
The method of manufacturing the semiconductor device according to claim 1 or 2, characterized in that said process for injecting ion into said substrate is executed by applying a maximum of sixty (60) degrees of angles against the normal of said substrate.
Claim 7
Dependent Claim 60 words
The method of manufacturing the semiconductor device according to claim 1 or 2, characterized in that said process for injecting ion into said substrate executed by applying a minimum of eight degrees of angle against the normal of said substrate is consummated simultaneous with injection of ion executed for the formation of the source and drain regions of said transistor.
Claim 8
Dependent Claim 134 words
The method of manufacturing the semiconductor device according to claim 1 or 2, characterized in that said process for injecting ion into said semiconductor substrate is executed in accordance with the condition specified by an expression shown below; X p ·tanϑ ≧ X jl where X p designates the mean projected range of the first conductive impurities injected into said substrate in conjunction with ion from the surface of said substrate; ϑ designates the angle at which ion is injected against the normal of said substrate; and X jl designates the extended distance of the edge of drain or source region as a result of elongation in the direction of channel region below said stacked gate electrode unit by effect of diffusion until reaching the final production process after completing the ion injection process.
Claim 9
Dependent Claim 88 words
The method of manufacturing the semiconductor device according to claim 1 or 2, characterized by further comprising a step of ion injection in order that X p can satisfy the condition specified by an expression shown below; ½X j ≦ X p ≦ 2X j where X p designates the mean projected range of the first conductive impurities injected into said semiconductor substrate in conjunction with ion from the surface of said substrate; and X j designates the depth of junction of diffused drain layer of said substrate.

References Cited (Backward Citations)

US4232439A Cited
US4771012A Cited
EP0333583A2 Cited

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