US5394359A — MOS integrated circuit with adjustable threshold …

Claim 1

Independent Claim 304 words

A method for operating a MOS cell for providing an adjustable reference voltage, said reference voltage being designed to be compared with an unknown voltage to distinguish either said unknown voltage is lower or greater than said reference voltage, said method comprising the steps of: a cell of the type with a memory transistor that is electrically-erasable and programmable by storage of charges by tunnel effect into a floating gate of said memory transistor, under the effect of an intense field, is integrated in an integrated circuit; said integrated circuit is permanently connected to a supply voltage and also to a ground voltage, a conduction threshold voltage of said cell is adjusted, in a calibration phase, by storing a predefined quantity of charges into said floating gate of said memory transistor; said calibration phase comprising the connection of a control gate of said memory transistor to a voltage Vref supply and the connection of its drain and source between respectively a programming high voltage supply and said ground voltage, the voltage value Vref equals said desired adjustable reference voltage, said Vref voltage being different from said ground voltage, from said programming high voltage, and from said supply voltage, during said calibration phase the potential difference between the source and drain on said memory transistor increases till it does no more increase, at this time a tunnel effect is set in the cell, the charges then accumulating in the floating gate, the transistor of the cell commencing to conduct and the current which occurs on the drain causing a fall in the programming voltage which cease to increase, at that time the conduction threshold voltage of said cell is spontaneously adjusted to the value of the desired adjustable reference voltage, said conduction threshold voltage of said memory transistor is utilised as said adjustable reference voltage.

Claim 2

Independent Claim 304 words

A method for operating a MOS cell for providing an adjustable reference voltage, said reference voltage being designed to be compared with an unknown voltage to distinguish either said unknown voltage is lower or greater than said reference voltage, said method comprising the steps of: a cell of the type with a memory transistor that is electrically-erasable and programmable by storage of charges by tunnel effect into a floating gate of said memory transistor, under the effect of an intense field, is integrated in an integrated circuit; said integrated circuit is permanently connected to a supply voltage and also to a ground voltage, a conduction threshold voltage of said cell is adjusted, in a calibration phase, by storing a predefined quantity of charges into said floating gate of said memory transistor; said calibration phase comprising the connection of a control gate of said memory transistor to a voltage Vref supply and the connection of its drain and source between respectively a programming high voltage supply and said ground voltage, the voltage value Vref equals said desired adjustable reference voltage, said Vref voltage being different from said ground voltage, from said programming high voltage, and from said supply voltage, during said calibration phase the potential difference between the source and drain on said memory transistor increases till it does no more increase, at this time a tunnel effect is set in the cell, the charges then accumulating in the floating gate, the transistor of the cell commencing to conduct and the current which occurs on the drain causing a fall in the programming voltage which cease to increase, at that time the conduction threshold voltage of said cell is spontaneously adjusted to the value of the desired adjustable reference voltage, said conduction threshold voltage of said memory transistor is utilised as said adjustable reference voltage.

Claim 3

Dependent Claim 85 words

A method according to claim 1 wherein the adjustment of the threshold of the cell is done in two phases: a first phase, an erasing phase, during which an electrical field, at least equal in value to the field needed for the storage by tunnel effect, being applied between a control gate and a source of said transistor, the cell having its source connected to said ground voltage and its control gate connected to said high programming voltage; said calibration phase following said first phase.

Claim 4

Dependent Claim 257 words

Process for producing an adjustable threshold voltage, comprising the following steps: a cell of the memory type is selected in an integrated circuit, this cell of the memory type being of the type having a floating gate transistor which is programmable and erasable electrically by the storage of charges through the tunnel effect in the floating gate of said transistor, under the effect of an intense field, a memory cell of this type being readable by exposing one of the terminals of this cell to a reading potential, the read state being deduced from whether or not this floating gate transistor is rendered conductive, the integrated circuit being permanently connected on the one hand to a supply voltage and on the other hand to earth potential; wherein the source of this floating gate transistor is brought to an earth potential, the control gate of this floating gate transistor is brought to a reference voltage used to determine a desired threshold voltage, and the drain of this floating gate transistor is brought to a high programming voltage; the threshold voltage being then adjusted in a calibration phase by the storage of a predefined quantity of charges under the floating gate, in which phase the programming voltage increases until the moment when the tunnel effect is set up, the charges then accumulating under the floating gate, the transistor then commencing to conduct and the current which occurs on the drain causing a fall in the programming voltage, which ceases to increase, the threshold voltage being obtained in this manner.

Claim 5

Dependent Claim 257 words

Process for producing an adjustable threshold voltage, comprising the following steps: a cell of the memory type is selected in an integrated circuit, this cell of the memory type being of the type having a floating gate transistor which is programmable and erasable electrically by the storage of charges through the tunnel effect in the floating gate of said transistor, under the effect of an intense field, a memory cell of this type being readable by exposing one of the terminals of this cell to a reading potential, the read state being deduced from whether or not this floating gate transistor is rendered conductive, the integrated circuit being permanently connected on the one hand to a supply voltage and on the other hand to earth potential; wherein the source of this floating gate transistor is brought to an earth potential, the control gate of this floating gate transistor is brought to a reference voltage used to determine a desired threshold voltage, and the drain of this floating gate transistor is brought to a high programming voltage; the threshold voltage being then adjusted in a calibration phase by the storage of a predefined quantity of charges under the floating gate, in which phase the programming voltage increases until the moment when the tunnel effect is set up, the charges then accumulating under the floating gate, the transistor then commencing to conduct and the current which occurs on the drain causing a fall in the programming voltage, which ceases to increase, the threshold voltage being obtained in this manner.

Claim 6

Dependent Claim 37 words

Process in accordance with claim 3, wherein the control grid of said cell is connected to its drain and said cell is fed between the earth-potential and the supply voltage with a transistor connected thereto in series.

Claim 7

Dependent Claim 107 words

Process in accordance with claim 3, wherein the control gate of the floating grid transistor is then connected to a control gate of a control transistor, while the drain of the floating gate transistor of this cell is connected to the drain of said control transistor, and said cell is fed in series with this control transistor, between the earth and a supply voltage, the connected control gates are subjected to a voltage to be tested, this assembly supplying at its output a signal which represents a comparison of this voltage to be tested with the value of said threshold voltage of the said floating gate transistor.

Claim 8

Dependent Claim 127 words

Process in accordance with claim 3, wherein the threshold voltage is adjusted in two phases: a first phase in the course of which a predefined quantity of charges is stored in the floating gate, an electrical field at least equal to the field required for the transfer by the tunnel effect being applied in a window, the source of the cell being put at earth potential and its control gate put at a high programming voltage, and a second phase in the course of which the control gate of the cell is brought to a reference (V ref ) equal to the desired threshold voltage (V TC ), its source being put at an earth potential and its drain being brought to the said high programming voltage.

Claim 9

Dependent Claim 127 words

Process in accordance with claim 4, wherein the threshold voltage is adjusted in two phases: a first phase in the course of which a predefined quantity of charges is stored in the floating gate, an electrical field at least equal to the field required for the transfer by the tunnel effect being applied in a window, the source of the cell being put at earth potential and its control gate put at a high programming voltage, and a second phase in the course of which the control gate of the cell is brought to a reference (V ref ) equal to the desired threshold voltage (V TC ), its source being put at an earth potential and its drain being brought to the said high programming voltage.

Claim 10

Dependent Claim 127 words

Process in accordance with claim 5, wherein the threshold voltage is adjusted in two phases: a first phase in the course of which a predefined quantity of charges is stored in the floating gate, an electrical field at least equal to the field required for the transfer by the tunnel effect being applied in a window, the source of the cell being put at earth potential and its control grid put at a high programming voltage, and a second phase in the course of which the control gate of the cell is brought to a reference (V ref ) equal to the desired threshold voltage (V TC ), its source being put at an earth potential and its drain being brought to the said high programming voltage.

Annuity Stage	Window Opens	Payment Deadline	Surcharge Period Until	Estimated Fee	Status
3.5 Years (Year 4)	1998-02-27	1998-08-29	1999-02-28	$2000.00	Window Closed / Lapsed
7.5 Years (Year 8)	2002-02-27	2002-08-29	2003-02-28	$3760.00	Window Closed / Lapsed
11.5 Years (Year 12)	2006-02-27	2006-08-29	2007-02-28	$7700.00	Window Closed / Lapsed

MOS integrated circuit with adjustable threshold voltage

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