Abstract A method and apparatus for electrically interconnecting various electronic elements, including circuit components, assemblies, and subassemblies. A particle enhanced material metal contact layer, having a surface, formed on the electronic elements, includes particles of greater hardness disposed on and/or within the metal contact layer, which particles form protuberances that concentrate stress when said contact surface is brought into contact with an opposing surface under pressure, to thereby penetrate the opposing surface and form a metal matrix between the two surfaces. The invention includes preferred and alternative embodiments incorporating particle enhanced material that provide a semiconductor test array which may be patterned as desired to receive an integrated circuit die and/or packaged components to facilitate integrated circuit and packaged electronic component testing; a probing device for testing integrated circuit die in situ on a semiconductor wafer; connectors for coupling discontinuous circuit element substrates; an interposer for interconnecting conventional components, circuit boards, and assemblies; and connectors for single and multiple layer circuit boards.
An apparatus for testing at least one integrated circuit in situ on a silicon wafer, comprising: a probe array having individual interconnect elements for contacting corresponding terminal pads on said integrated circuit, each interconnect element of said probe array having a metal contact layer, including associated particles having a hardness greater than that of said metal; and means for applying compressive force normal to said probe array and said integrated circuit; whereby a conductive metal matrix is formed between each of said probe array interconnect elements and a corresponding terminal pad when said particles pierce a terminal pad surface.
Claim 2
Independent Claim
99 words
An apparatus for testing at least one integrated circuit in situ on a silicon wafer, comprising: a probe array having individual interconnect elements for contacting corresponding terminal pads on said integrated circuit, each interconnect element of said probe array having a metal contact layer, including associated particles having a hardness greater than that of said metal; and means for applying compressive force normal to said probe array and said integrated circuit; whereby a conductive metal matrix is formed between each of said probe array interconnect elements and a corresponding terminal pad when said particles pierce a terminal pad surface.