Patent US5504038A successfully refreshed from Google Patents.
US5504038A
Expired / Lapsed
US
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Method for selective tungsten sidewall and bottom contact formation
Assignee: United Microelectronics Corp
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Filing: 1995-05-25
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Granted: 1996-04-02
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Expires: 2015-05-25
Abstract
Abstract A structure and method is provided for forming a contact plug in a contact hole in a dielectric layer on a semiconductor substrate. A polysilicon spacer is formed on the sidewalls and bottom of the contact hole. A metal, such as titanium, is deposited on the sidewalls and bottom of the hole and on the dielectric layer. The substrate is heated to form a metal silicide layer, such as TiSi x , and a metal nitride layer, such as TiN, on the side-walls and bottom of the contact hole. Any remaining metal layer and metal nitride layer formed in the heating process is removed. This leaves the titanium silicide layer on the contact hole walls. Tungsten is deposited to fill the contact hole where the metal silicide promotes the nucleation of the tungsten. In a preferred embodiment, to further promote nucleation of the tungsten, a second metal nitride layer is formed on the surface; of the metal silicide layer just prior to tungsten deposition.
Inventors
- 👤 Sun-Chieh Chien
- 👤 Jengping Lin
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-31 07:23
CPC Classifications
H; H10; H10W; H10W20/00; H10W20/01; H10W20/031; H10W20/032; H10W20/042; H10W20/045; H10W20/033; H10W20/034; H10W20/047; H10W20/048; H10W20/056; H10W20/057
Claims Analysis
Total Claims: 22
Claim 1
Independent Claim
208 words
A method of forming an electrical interconnection for a multi-layer semiconductor circuit, the method comprising the steps of: forming a dielectric layer on a substrate; etching a contact hole through said dielectric layer, said contact hole defined by substantially vertical sidewalls of said dielectric layer and a bottom contact surface of the substrate; forming a silicon oxide layer on said bottom contact surface; depositing a silicon polysilicon layer on the substrate surface; etching the polysilicon layer to form polysilicon sidewall spacers on said sidewalls and exposing portions of said silicon oxide layer on the bottom contact surface; removing the exposed portions of said silicon oxide layer on said bottom contact surface; depositing a metal layer on said spacers, on said bottom contact surface and on said dielectric layer; forming a metal silicide layer and a first metal nitride layer on at least said spacers and said bottom contact surface by reacting said metal layer with said polysilicon layer and said bottom contact surface; removing the first metal nitride layer and the remaining unreacted metal layer; and filling only the contact hole with tungsten so that the tungsten forms electrical contact with the bottom surface without forming tungsten on other surfaces, thus forming the electrical interconnection of the invention.
Claim 2
Independent Claim
208 words
A method of forming an electrical interconnection for a multi-layer semiconductor circuit, the method comprising the steps of: forming a dielectric layer on a substrate; etching a contact hole through said dielectric layer, said contact hole defined by substantially vertical sidewalls of said dielectric layer and a bottom contact surface of the substrate; forming a silicon oxide layer on said bottom contact surface; depositing a silicon polysilicon layer on the substrate surface; etching the polysilicon layer to form polysilicon sidewall spacers on said sidewalls and exposing portions of said silicon oxide layer on the bottom contact surface; removing the exposed portions of said silicon oxide layer on said bottom contact surface; depositing a metal layer on said spacers, on said bottom contact surface and on said dielectric layer; forming a metal silicide layer and a first metal nitride layer on at least said spacers and said bottom contact surface by reacting said metal layer with said polysilicon layer and said bottom contact surface; removing the first metal nitride layer and the remaining unreacted metal layer; and filling only the contact hole with tungsten so that the tungsten forms electrical contact with the bottom surface without forming tungsten on other surfaces, thus forming the electrical interconnection of the invention.
Claim 3
Dependent Claim
29 words
The method of claim 1 wherein after said metal layer is formed of titanium, said metal nitride layer formed of titanium nitride, and said metal silicide is titanium silicide.
Claim 4
Dependent Claim
21 words
The method of claim 1 wherein the dielectric layer has a thickness in the range of about 3000 to 10,000 Å.
Claim 5
Dependent Claim
21 words
The method of claim 1 wherein the contact hole has a diameter in the range of about 0.3 to 1.0 microns.
Claim 6
Dependent Claim
22 words
The method of claim 1 wherein the thickness of the silicon oxide is in the range of about 50 to 200 Å.
Claim 7
Dependent Claim
21 words
The method of claim 1 wherein the thickness of polysilicon layer is in the range of about 500 to 1500 Å.
Claim 8
Dependent Claim
21 words
The method of claim 1 wherein the thickness of metal layer is in the range of about 300 to 800 Å.
Claim 9
Dependent Claim
22 words
The method of claim 1 wherein the thickness of said metal silicide layer is in range of about 500 to 1500 Å.
Claim 10
Dependent Claim
22 words
The method of claim 1 wherein said metal and metal nitride layers are removed by a wet H 2 O 2 solution.
Claim 11
Dependent Claim
54 words
The method of claim 9 wherein said metal and metal nitride layers are removed by a wet H 2 O 2 solution composed of H 2 O 2 /NH 4 OH/H 2 O at a ratio of 1:1:5 at a temperature between about 50° to 80° C. for between about 20 to 60 minutes.
Claim 12
Independent Claim
201 words
A method of forming an electrical interconnection for a multi-layer semiconductor circuit, the method comprising the steps of: forming a dielectric layer on a substrate; etching a contract hole through said dielectric layer, said contact hole defined by substantially vertical sidewalls of said dielectric layer and a bottom contact surface of the substrate; forming a silicon oxide layer on said bottom contact surface; forming polysilicon side-wall spacers on said sidewalls of said dielectric layer; removing said silicon oxide layer on said bottom contact surface; depositing a metal layer onto said spacers, on said bottom contact surface and on said dielectric layer; forming a metal silicide layer and a first metal nitride layer on at least said spacers and said bottom contact surface by reacting said metal layer with said polysilicon layer and said bottom contact surface; removing the first metal nitride layer and the remaining unreacted metal layer; forming a second metal nitride layer on the metal silicide layer on said sidewalls spacers and said bottom contact surface; and filling only the contact hole with tungsten so that the tungsten forms electrical contact with the bottom surface without forming tungsten on other surfaces, thus forming the electrical interconnection of the invention.
Claim 13
Independent Claim
201 words
A method of forming an electrical interconnection for a multi-layer semiconductor circuit, the method comprising the steps of: forming a dielectric layer on a substrate; etching a contract hole through said dielectric layer, said contact hole defined by substantially vertical sidewalls of said dielectric layer and a bottom contact surface of the substrate; forming a silicon oxide layer on said bottom contact surface; forming polysilicon side-wall spacers on said sidewalls of said dielectric layer; removing said silicon oxide layer on said bottom contact surface; depositing a metal layer onto said spacers, on said bottom contact surface and on said dielectric layer; forming a metal silicide layer and a first metal nitride layer on at least said spacers and said bottom contact surface by reacting said metal layer with said polysilicon layer and said bottom contact surface; removing the first metal nitride layer and the remaining unreacted metal layer; forming a second metal nitride layer on the metal silicide layer on said sidewalls spacers and said bottom contact surface; and filling only the contact hole with tungsten so that the tungsten forms electrical contact with the bottom surface without forming tungsten on other surfaces, thus forming the electrical interconnection of the invention.
Claim 14
Dependent Claim
25 words
The method of claim 11 wherein said metal layer is titanium, said first metal nitride layer is TiN and said metal silicide is titanium silicide.
Claim 15
Dependent Claim
43 words
The method of claim 11 wherein said second metal nitride layer is formed by a rapid thermal anneal with N 2 or NH 3 gas at a temperature in the range of about 700° to 800° C. for less than about 60 seconds.
Claim 16
Dependent Claim
25 words
The method of claim 13 wherein said metal layer is titanium, said first metal nitride layer is TiN and said metal silicide is titanium silicide.
Claim 17
Independent Claim
239 words
A method of forming an electrical interconnection for a multi-layer semiconductor circuit, the method comprising the steps of forming a dielectric layer on a substrate; etching a contact hole through said dielectric layer, said contact hole defined by substantially vertical sidewalls of said dielectric layer and a bottom contact surface of the substrate; forming a silicon oxide layer on said bottom contact surface; forming polysilicon side-wall spacers on said sidewalls of said dielectric layer and exposing said silicon oxide layer on the bottom contact surface; removing said silicon oxide layer on said bottom contact surface; depositing a metal layer onto said spacers, on said bottom contact surface and on said dielectric layer; forming a metal silicide layer and a first metal nitride layer on at least said spacers and said bottom contact surface by reacting said metal layer with said polysilicon layer and the substrate on said bottom contact surface; forming a spin-on-glass layer which partially fills said contact hole, the spin-on-glass layer covering the first metal nitride layer and metal layer on said spacers and said bottom contact surface; removing portions of the first metal nitride layer and the remaining unreacted metal layer that are not covered by the spin-on-glass layer; removing the spin-on-glass layer; and filling only the contact hole with tungsten so that the tungsten forms electrical contact with the bottom surface without forming tungsten on other surfaces, thus forming the electrical interconnection of the invention.
Claim 18
Independent Claim
239 words
A method of forming an electrical interconnection for a multi-layer semiconductor circuit, the method comprising the steps of forming a dielectric layer on a substrate; etching a contact hole through said dielectric layer, said contact hole defined by substantially vertical sidewalls of said dielectric layer and a bottom contact surface of the substrate; forming a silicon oxide layer on said bottom contact surface; forming polysilicon side-wall spacers on said sidewalls of said dielectric layer and exposing said silicon oxide layer on the bottom contact surface; removing said silicon oxide layer on said bottom contact surface; depositing a metal layer onto said spacers, on said bottom contact surface and on said dielectric layer; forming a metal silicide layer and a first metal nitride layer on at least said spacers and said bottom contact surface by reacting said metal layer with said polysilicon layer and the substrate on said bottom contact surface; forming a spin-on-glass layer which partially fills said contact hole, the spin-on-glass layer covering the first metal nitride layer and metal layer on said spacers and said bottom contact surface; removing portions of the first metal nitride layer and the remaining unreacted metal layer that are not covered by the spin-on-glass layer; removing the spin-on-glass layer; and filling only the contact hole with tungsten so that the tungsten forms electrical contact with the bottom surface without forming tungsten on other surfaces, thus forming the electrical interconnection of the invention.
Claim 19
Dependent Claim
25 words
The method of claim 15 wherein said metal layer is titanium, said first metal nitride layer is TiN and said metal silicide is titanium silicide.
Claim 20
Independent Claim
231 words
A method of forming an electrical interconnection for a multi-layer semiconductor circuit, the method comprising the steps of; forming a dielectric layer on a substrate; etching a contact hole through said dielectric layer, said contact hole defined by substantially vertical sidewalls of said dielectric layer and a bottom contact surface of the substrate; forming a silicon oxide layer on said bottom contact surface; depositing a silicon polysilicon layer on the surface of said silicon oxide layer; forming polysilicon side-wall spacers on said sidewalls; removing said silicon oxide layer; depositing a metal layer on said spacers, on said bottom contact surface and on said dielectric layer; depositing a third metal nitride layer over the metal layer; forming a metal silicide layer on at least said spacers and said bottom contact surface by reacting said metal layer with said polysilicon layer and the substrate on said bottom contact surface; forming a spin-on-glass layer which partially fills said contact hole; the spin-on-glass layer covering said third metal nitride layer and metal layer on said spacers and said bottom contact surface; removing the uncovered portions of the third metal nitride layer and the remaining unreacted metal layer; and removing the spin-on-glass layer; and filling only the contact hole with tungsten so that the tungsten forms electrical contact with the bottom surface without forming tungsten on other surfaces, thus forming the electrical interconnection of the invention.
Claim 21
Independent Claim
231 words
A method of forming an electrical interconnection for a multi-layer semiconductor circuit, the method comprising the steps of; forming a dielectric layer on a substrate; etching a contact hole through said dielectric layer, said contact hole defined by substantially vertical sidewalls of said dielectric layer and a bottom contact surface of the substrate; forming a silicon oxide layer on said bottom contact surface; depositing a silicon polysilicon layer on the surface of said silicon oxide layer; forming polysilicon side-wall spacers on said sidewalls; removing said silicon oxide layer; depositing a metal layer on said spacers, on said bottom contact surface and on said dielectric layer; depositing a third metal nitride layer over the metal layer; forming a metal silicide layer on at least said spacers and said bottom contact surface by reacting said metal layer with said polysilicon layer and the substrate on said bottom contact surface; forming a spin-on-glass layer which partially fills said contact hole; the spin-on-glass layer covering said third metal nitride layer and metal layer on said spacers and said bottom contact surface; removing the uncovered portions of the third metal nitride layer and the remaining unreacted metal layer; and removing the spin-on-glass layer; and filling only the contact hole with tungsten so that the tungsten forms electrical contact with the bottom surface without forming tungsten on other surfaces, thus forming the electrical interconnection of the invention.
Claim 22
Dependent Claim
25 words
The method of claim 17 wherein said metal layer is titanium, said third metal nitride layer is TiN and said metal silicide is titanium silicide.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1999-04-02 | 1999-10-02 | 2000-04-02 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2003-04-02 | 2003-10-02 | 2004-04-02 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2007-04-02 | 2007-10-02 | 2008-04-02 | $7700.00 | Window Closed / Lapsed |