US5497376A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Method and device for detecting and correcting errors in memory modules
Assignee: Alcatel Lucent NV
•
Filing: 1994-08-26
•
Granted: 1996-03-05
•
Expires: 2014-08-26
Abstract
Abstract Single error correction in digital memory modules is simply accomplished at any time by dividing the memory module into segments, writing data into the memory module, testing the memory module after a period of time and, on the occurrence of a single error, data correction is entered. This process is repeated until no single error is found. Such single error correction is fast a single error correction is possible without the need for external memory.
Inventors
- 👤 Dieter Kopp
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-02 10:53
CPC Classifications
G; G11; G11C; G11C29/00; G11C29/04; G11C29/08; G11C29/52; G11C29/12; G11C29/1201; G11C29/38; G11C29/40
Claims Analysis
Total Claims: 11
Claim 1
Independent Claim
135 words
A method of detecting and correcting errors in memory modules wherein each memory module is divided into segments, wherein before data is written in to a memory module, any accumulation of errors in a segment of the memory module is detected by means of a memory test, wherein on the occurrence of an accumulation of errors, the segment is no longer used for storing data, wherein data is written in to the memory module, excluding those segments which are no longer used for storing data, wherein after expiration of a period of time following the write-in of data, each segment is checked for single errors, wherein on the occurrence of a single error, correction data is written into the segment, and wherein said check for single errors is repeated until no single error is detected.
Claim 2
Independent Claim
135 words
A method of detecting and correcting errors in memory modules wherein each memory module is divided into segments, wherein before data is written in to a memory module, any accumulation of errors in a segment of the memory module is detected by means of a memory test, wherein on the occurrence of an accumulation of errors, the segment is no longer used for storing data, wherein data is written in to the memory module, excluding those segments which are no longer used for storing data, wherein after expiration of a period of time following the write-in of data, each segment is checked for single errors, wherein on the occurrence of a single error, correction data is written into the segment, and wherein said check for single errors is repeated until no single error is detected.
Claim 3
Dependent Claim
63 words
A method as claimed in claim 1, wherein on the occurrence of a single error in a segment, an error counter is incremented by one, the error counter indicating the absolute number of single errors in a corresponding segment, and wherein if the count of the error counter exceeds a predetermined value, the corresponding segment will no longer be used for storing data.
Claim 4
Dependent Claim
21 words
A method as claimed in claim 1, wherein said memory module is used in digital answering machines for recording spoken messages.
Claim 5
Dependent Claim
22 words
A method as claimed in claim 1, wherein said memory module is used in telecommunication terminals for video, text, and voice communications.
Claim 6
Dependent Claim
67 words
A method as claimed in claim 1, wherein each segment is divided into a plurality of words, wherein as the first two words of each segment, a count of the number of single errors is entered, wherein from the third word, the data is written in, and wherein from the last word of each segment, the correction data is written in the direction of the first word.
Claim 7
Dependent Claim
43 words
A method as claimed in claim 5, wherein to perform the correction, the data of each segment is read as a whole, and wherein from said single error count, the area containing the data and the area containing the correction data are calculated.
Claim 8
Dependent Claim
119 words
Apparatus for detecting and correcting errors in memory modules divided into segments, said apparatus comprising: write and read means for writing and reading data into and from the segments of memory modules, first means for carrying out a memory test to detect an accumulation of errors in a segment, second means for carrying out a memory test to detect single errors in a segment, write means responsive to the detection of a single error in one of the segments for writing correction data into the one segment, means for calculating areas into which data have to be entered and areas into which correction data have to be entered, and an error counter for counting the number of single errors.
Claim 9
Dependent Claim
119 words
Apparatus for detecting and correcting errors in memory modules divided into segments, said apparatus comprising: write and read means for writing and reading data into and from the segments of memory modules, first means for carrying out a memory test to detect an accumulation of errors in a segment, second means for carrying out a memory test to detect single errors in a segment, write means responsive to the detection of a single error in one of the segments for writing correction data into the one segment, means for calculating areas into which data have to be entered and areas into which correction data have to be entered, and an error counter for counting the number of single errors.
Claim 10
Dependent Claim
33 words
Apparatus as claimed in claim 7, wherein the memory module is responsive to the detection of an accumulation of single errors in a segment for no longer using the segment for storing data.
Claim 11
Dependent Claim
50 words
Apparatus as claimed in claim 7, wherein a count in said error counter is indicative of an absolute number of single errors in a corresponding segment, and wherein said memory module is responsive to said count exceeding a predetermined value for no longer using the corresponding segment for storing data.
References Cited (Backward Citations)
US4627093A
Cited
EP0052216A2
Cited
US4493075A
Cited
US4584681A
Cited
US4608687A
Cited
US4654847A
Cited
US4939694A
Cited
US5200959A
Cited
US5278839A
Cited
US5199033A
Cited
US5357473A
Cited
DE4035861A1
Cited
US5263032A
Cited
US5267242A
Cited
US5359569A
Cited
DE4204929A1
Cited
US5359570A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1999-03-05 | 1999-09-04 | 2000-03-05 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2003-03-05 | 2003-09-04 | 2004-03-05 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2007-03-05 | 2007-09-04 | 2008-03-05 | $7700.00 | Window Closed / Lapsed |