US5359569A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Semiconductor memory
Assignee: Hitachi Ltd
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Filing: 1992-10-29
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Granted: 1994-10-25
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Expires: 2012-10-29
Abstract
Abstract A semiconductor storage including a main flash memory, a volatile write cache, a data control circuit, an alternate flash memory and a power supply. This arrangement permits the use of a smaller write cache in comparison with the use of a non-volatile memory, and also provides decreased capacity of the write cache, permitting high-speed access and long-life.
Inventors
- 👤 Kenji Fujita
- 👤 Toshiyuki Nakao
- 👤 Hirotsugu Yamagata
- 👤 Nobuyuki Saze
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-25 19:40
CPC Classifications
G; G06; G06F; G06F12/00; G06F12/02; G06F12/08; G06F12/0802; G06F12/0804; G11; G11C; G11C14/00; G11C29/00; G11C29/70; G11C29/76; G11C29/765; G06F11/00; G06F11/07; G06F11/08; G06F11/10; G06F11/1008; G06F11/1068; G06F11/14; G06F11/1402; G06F11/1415; G06F12/0223; G06F12/023; G06F12/0238; G06F12/0246; G06F2201/00; G06F2201/88; G06F2212/00; G06F2212/20; G06F2212/202; G06F2212/2022; G06F2212/22; G06F2212/222; G06F2212/2228; G06F2212/72; G06F2212/7203
Claims Analysis
Total Claims: 15
Claim 1
Independent Claim
180 words
A semiconductor storage comprising: a non-volatile semiconductor memory; a volatile semiconductor memory; a data control circuit, connected to said non-volatile semiconductor memory and said volatile semiconductor memory, for controlling read out of data from the non-volatile semiconductor memory and writing of data into the volatile semiconductor memory in response to an access instruction; a battery for supplying power to the non-volatile semiconductor memory and the volatile semiconductor memory for a period of time during which said power supply circuit is in failure, wherein said data control circuit has first writing means for writing the data written in the volatile semiconductor memory into the non-volatile semiconductor memory for a period of time during which the reading and writing operations responsive to said access instruction are not executed, wherein said non-volatile semiconductor memory has a redundant non-volatile semiconductor memory, and wherein said data control circuit has second writing means for detecting a predetermined condition in the non-volatile semiconductor memory and for writing the data written in the volatile semiconductor memory into said redundant non-volatile semiconductor memory into said redundant non-volatile semiconductor memory.
Claim 2
Dependent Claim
180 words
A semiconductor storage comprising: a non-volatile semiconductor memory; a volatile semiconductor memory; a data control circuit, connected to said non-volatile semiconductor memory and said volatile semiconductor memory, for controlling read out of data from the non-volatile semiconductor memory and writing of data into the volatile semiconductor memory in response to an access instruction; a battery for supplying power to the non-volatile semiconductor memory and the volatile semiconductor memory for a period of time during which said power supply circuit is in failure, wherein said data control circuit has first writing means for writing the data written in the volatile semiconductor memory into the non-volatile semiconductor memory for a period of time during which the reading and writing operations responsive to said access instruction are not executed, wherein said non-volatile semiconductor memory has a redundant non-volatile semiconductor memory, and wherein said data control circuit has second writing means for detecting a predetermined condition in the non-volatile semiconductor memory and for writing the data written in the volatile semiconductor memory into said redundant non-volatile semiconductor memory into said redundant non-volatile semiconductor memory.
Claim 3
Dependent Claim
118 words
A semiconductor storage according to claim 1, wherein said data control circuit includes: a buffer memory for holding the data read out from the non-volatile semiconductor memory in response to the access instruction; error check means for detecting whether an error is included in the data read out from the non-volatile semiconductor memory in response to the access instruction or not; and a table for holding an address to write the data, wherein said data control circuit changes the address for said data in which an error was detected in said table to a predetermined location in the redundant memory and writes said data in which an error was detected into the predetermined location of the redundant memory.
Claim 4
Dependent Claim
41 words
A semiconductor storage according to claim 2, wherein said data control circuit has means for generating a write end signal when received data is completely written into the buffer memory in the case where the access instruction is a write instruction.
Claim 5
Dependent Claim
59 words
A semiconductor storage according to claim 3, wherein said power supply circuit has a diode connected in series between said power supply circuit and said battery so that a current from the battery does not flow into the power supply circuit when both of the power from the power supply circuit and the power from the battery are given.
Claim 6
Dependent Claim
53 words
A semiconductor storage according to claim 2, wherein the data is written into the volatile semiconductor memory non a unit basis of a record comprised of a plurality of bytes and the data is written into the non-volatile semiconductor memory on a unit basis of a block comprised of a plurality of records.
Claim 7
Dependent Claim
42 words
A semiconductor storage according to claim 1, wherein said data control circuit has means for generating a write end signal when the received data is completely written into the buffer memory in the case where said access instruction is a write instruction.
Claim 8
Dependent Claim
62 words
A semiconductor storage according to claim 1, wherein said power supply circuit has a diode connected in series between both of the power supply circuit and the battery so that a current from the battery does not flow into the power supply circuit when both of the power supplied from the power supply circuit and the voltage from the battery are given.
Claim 9
Dependent Claim
53 words
A semiconductor storage according to claim 1, wherein the data is written into the volatile semiconductor memory on a unit basis of a record comprised of a plurality of bytes and the data is written into the non-volatile semiconductor memory on a unit basis of a block comprised of a plurality of records.
Claim 10
Dependent Claim
98 words
A semiconductor storage according to claim 1, wherein said data control circuit includes: a buffer memory for holding the data read out from the non-volatile semiconductor memory in response to the access instruction; holding means for counting and holding the number of write instructions in response to the access instruction; and a table to hold an address to write the data, wherein when the content in said holding means reaches a predetermined value, the data control circuit changes the address in said table to an address in said redundant memory and writes the data into the redundant memory.
Claim 11
Dependent Claim
42 words
A semiconductor storage according to claim 9, wherein said data control circuit has means for generating a write end signal when the received data is completely written into the buffer memory in the case where the access instruction is a write instruction.
Claim 12
Dependent Claim
59 words
A semiconductor storage according to claim 9, wherein said power supply circuit has diodes connected in series between the power supply circuit and the battery so that a current from the battery does not flow into the power supply circuit when both of the power supplied from the power supply circuit and the power from the battery are given.
Claim 13
Dependent Claim
53 words
A semiconductor storage according to claim 9, wherein the data is written into the volatile semiconductor memory on a unit basis of a record comprised of a plurality of bytes and the data is written into the non-volatile semiconductor memory on a unit basis of a block comprised of a plurality of records.
Claim 14
Dependent Claim
42 words
A semiconductor storage according to claim 9, wherein said data control circuit has means for generating a write end signal when the received data is completely written into the buffer memory in the case where the access instruction is a write instruction.
Claim 15
Dependent Claim
25 words
A semiconductor storage according to claim 9, wherein said non-volatile semiconductor memory is a flash memory and said volatile semiconductor memory is a cache memory.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1997-10-24 | 1998-04-25 | 1998-10-25 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2001-10-24 | 2002-04-25 | 2002-10-25 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2005-10-24 | 2006-04-25 | 2006-10-25 | $7700.00 | Window Closed / Lapsed |