US4627093A
Expired / Lapsed
US
⏱️ 0.0 years remaining
One-chip LSI speech synthesizer
Assignee: Sharp Corp
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Filing: 1980-12-29
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Granted: 1986-12-02
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Expires: 2000-12-29
Abstract
Abstract There is disclosed a one-chip speech synthesizer capable of providing synthesized human voices through a new and effective concept of LSI architecture. The synthesizer may execute all of the steps necessary for processing of sample data and enhances the processing speed through a new memory architecture by constructing the one-word length of a control memory (control ROM) longer than the one-word length of a data memory (data ROM). The synthesizer reproduces audible synthesized sounds merely by an added amplifier outside the one-chip LSI semiconductor device without the need to provide a digital-to-analog converter. The LSI device may be used with an expandable external memory as an extension of the data memory (data ROM) whenever a large number of words are to be processed.
Inventors
- 👤 Shintaro Hashimoto
- 👤 Hideo Yoshida
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-02 18:11
CPC Classifications
G; G10; G10L; G10L13/00; G10L13/02; G10L13/04; G10L13/047
Claims Analysis
Total Claims: 5
Claim 1
Independent Claim
95 words
A speech synthesizer comprising a one-chip semiconductor integrated circuit which includes: first memory means for storing information for speech synthesizing; second memory means for storing control instructions and for addressing said first memory means for speech synthesis using said information stored in said first memory means; an external connection port for connecting said chip to means for producing audible synthesized speech output; and an external connection port for expansion of the memory capacity of said first memory means; wherein said second memory means has a one-word length longer than that of said first memory means.
Claim 2
Dependent Claim
95 words
A speech synthesizer comprising a one-chip semiconductor integrated circuit which includes: first memory means for storing information for speech synthesizing; second memory means for storing control instructions and for addressing said first memory means for speech synthesis using said information stored in said first memory means; an external connection port for connecting said chip to means for producing audible synthesized speech output; and an external connection port for expansion of the memory capacity of said first memory means; wherein said second memory means has a one-word length longer than that of said first memory means.
Claim 3
Dependent Claim
106 words
A speech synthesizer comprising a one-chip LSI semiconductor circuit which includes: control memory means for storing sequences for reproducing a plurality of sounds as fixed program instructions; data memory means for storing sound data including phonemic information for speech synthesis, and instructions data for modifying operations including data selection, pitch selection and repetition number selection; and processor memory means operatively connected to said control memory means and said data memory means for executing temporary storage and arithmetic operations necessary for speech synthesis, wherein said control memory means has a one-word length of 18 bits and said data memory means has a one-word length of 8 bits.
Claim 4
Dependent Claim
106 words
A speech synthesizer comprising a one-chip LSI semiconductor circuit which includes: control memory means for storing sequences for reproducing a plurality of sounds as fixed program instructions; data memory means for storing sound data including phonemic information for speech synthesis, and instructions data for modifying operations including data selection, pitch selection and repetition number selection; and processor memory means operatively connected to said control memory means and said data memory means for executing temporary storage and arithmetic operations necessary for speech synthesis, wherein said control memory means has a one-word length of 18 bits and said data memory means has a one-word length of 8 bits.
Claim 5
Dependent Claim
27 words
A speech synthesizer as in claim 2, wherein said control memory means comprises 100 operation steps and said data memory means comprises in excess of 1000 steps.
References Cited (Backward Citations)
US4179584A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1989-12-01 | 1990-06-02 | 1990-12-02 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1993-12-01 | 1994-06-02 | 1994-12-02 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1997-12-01 | 1998-06-02 | 1998-12-02 | $7700.00 | Window Closed / Lapsed |