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US5490040A Expired / Lapsed US ⏱️ 0.0 years remaining

Surface mount chip package having an array of solder ball contacts arranged in a circle and conductive pin contacts arranged outside the circular array

Assignee: International Business Machines Corp
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Filing: 1993-12-22
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Granted: 1996-02-06
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Expires: 2013-12-22
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Abstract

Abstract An electrical device for logic circuits having a package comprising a combination of controlled collapse electrical interconnections, such as solder balls and pin through-hole conductors, wherein the conductors are disposed outside the perimeter of an inter-array of solder balls, which when a maximum number of solder balls are disposed, the array is circular in shape, so as to provide an increased footprint for the electrical device beyond that, otherwise maximum footprint for solder balls alone, which footprint is otherwise limited in size due to failures which occur in solder balls when solder balls are exposed to thermal and mechanical stress levels at extended distances from the neutral or zero stress point of the array.

Inventors

  • 👤 Gene J. Gaudenzi
  • 👤 Joseph M. Mosley
  • 👤 Vito J. Tuozzolo
  • 👤 John C. Milliken

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-02 20:02
CPC Classifications
H; H10; H10W; H10W70/00; H10W70/60; H10W70/62; H10W70/65; H05; H05K; H05K3/00; H05K3/30; H05K3/32; H05K3/34; H05K3/341; H05K3/3415; H10W90/00; H10W90/701; H05K2201/00; H05K2201/10; H05K2201/10613; H05K2201/10621; H05K2201/10659; H05K2201/10734; H05K3/3447; H10W72/00; H10W72/851; H10W72/874; H10W72/877; H10W90/721; H10W90/724; Y; Y02; Y02P; Y02P70/00; Y02P70/50

Claims Analysis

Total Claims: 2
Claim 1
Independent Claim 209 words
A packaged electronic hardware unit having a footprint including an array of electrical connections for engagement with a circuit board for performing logic functions without incurring mechanical stress which can result in electrical discontinuity at the electrical connections, comprising: a substrate having a center and a planar underside surface; an electrical logic circuit have input/output terminals carried by the substrate; individual contacts of controlled collapse electrically conductive solder material connected to some of the input/output terminals formed in the shape of balls extending downwardly from the substrate and extending in an orthogonal direction from the planar underside surface of the substrate; and individual pins of electrically conductive material connected to other of the input/output terminals not connected to the contacts, extending downwardly from the substrate and orthogonally from the substantially planar underside surface of the substrate and disposed more outwardly from the center of the substrate than any contact to form an array of electrical connections including contacts and pins, which contacts include a maximum number of contacts forming a circular array of contacts, and which pins are disposed farther from the center of the substrate than the contacts to provide electrical connections which do not incur mechanical stress which can result in electrical discontinuity at the electrical connections.
Claim 2
Dependent Claim 209 words
A packaged electronic hardware unit having a footprint including an array of electrical connections for engagement with a circuit board for performing logic functions without incurring mechanical stress which can result in electrical discontinuity at the electrical connections, comprising: a substrate having a center and a planar underside surface; an electrical logic circuit have input/output terminals carried by the substrate; individual contacts of controlled collapse electrically conductive solder material connected to some of the input/output terminals formed in the shape of balls extending downwardly from the substrate and extending in an orthogonal direction from the planar underside surface of the substrate; and individual pins of electrically conductive material connected to other of the input/output terminals not connected to the contacts, extending downwardly from the substrate and orthogonally from the substantially planar underside surface of the substrate and disposed more outwardly from the center of the substrate than any contact to form an array of electrical connections including contacts and pins, which contacts include a maximum number of contacts forming a circular array of contacts, and which pins are disposed farther from the center of the substrate than the contacts to provide electrical connections which do not incur mechanical stress which can result in electrical discontinuity at the electrical connections.

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1999-02-05 1999-08-07 2000-02-06 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2003-02-05 2003-08-07 2004-02-06 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2007-02-05 2007-08-07 2008-02-06 $7700.00 Window Closed / Lapsed

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